topic Re: IMX8M reset implementation in i.MX Processors

IMX8M reset implementation

vadimaleynikov — Tue, 23 Jan 2018 12:42:38 GMT

The i.MX 8MDQLQ Hardware Developer’s Guide in Table 7 recommends that the reset button should be connected to the PMIC enable pin. In this case, the iMX8M reset is impelmented by swithching off all the IMX8M power (except probably SNVS).

What is the reason of a such drastic reset way?

Whether a less radical method of resetting the IMX8M exist (which doesn't require switching power off)?

Best regards,
Vadim Aleynikov

Re: IMX8M reset implementation

igorpadykov — Wed, 24 Jan 2018 00:37:32 GMT

Hi Vadim

such reset solution is similar one used on i.MX6Q Sabre SD board designs,

please check p.21 spf-27392 "PWRON" signal.

Schematics (1)
i.MX6_SABRE_SDP_DESIGNFILES
http://www.nxp.com/products/software-and-tools/hardware-development-tools/sabre-development-system/sabre-platform-for-smart-devices-based-on-the-i.mx-6-series:RDIMX6SABREPLAT?fpsp=1&tab=Design_Tools_Tab

or ENGR00338067 mentioned in AN5161 p.24

https://www.nxp.com/docs/en/application-note/AN5161.pdf

Swithching off all the IMX power is fool proof universal reset solution, probably one can use other solutions

but this require detailed schematic analysis for implications when some components remain

in non-reset state. There is no usiversal solution and each case should be separately considered.

Best regards
igor
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Re: IMX8M reset implementation

vadimaleynikov — Wed, 24 Jan 2018 13:45:07 GMT

Thank you, Igor.

Vadim