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    <title>topic Re: i.MX8m USB ID support in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748172#M116338</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank You Richard&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will investigate this. This can help us a lot.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 18 Jun 2018 11:33:11 GMT</pubDate>
    <dc:creator>gabriel_h</dc:creator>
    <dc:date>2018-06-18T11:33:11Z</dc:date>
    <item>
      <title>i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748163#M116329</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear NXP support,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'd appreciate it if you could shed light on the USB PHY USB_ID issue.&lt;/P&gt;&lt;P&gt;What is the reason why the evaluation board logic implements it using a "ptn5110"? The dedicated USB signal is routed to TP only.&lt;/P&gt;&lt;P&gt;We were able to make our board recognize device type with a "extcon-usb-gpio", but we'd like to use the USB PHY dedicated USB ID pin.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank You&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 11 Mar 2018 12:53:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748163#M116329</guid>
      <dc:creator>gabriel_h</dc:creator>
      <dc:date>2018-03-11T12:53:54Z</dc:date>
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      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748164#M116330</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Gaby&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;as described in &amp;nbsp;sect.3.7. USB connectivity i.MX8M Hardware Developer’s Guide:&lt;BR /&gt;The i.MX 8MDQLQ provides two complete USB3.0 interfaces and the following &lt;BR /&gt;configurations (or any subset) are supported :&lt;BR /&gt;•Dedicated host or device using Type-A connector or Type-B connector;&lt;BR /&gt;•Dual role using Type-C connector&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/user-guide/IMX8MDQLQHDG.pdf" title="https://www.nxp.com/docs/en/user-guide/IMX8MDQLQHDG.pdf"&gt;https://www.nxp.com/docs/en/user-guide/IMX8MDQLQHDG.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;According to usb specs available on&amp;nbsp; &lt;A class="link-titled" href="http://www.usb.org" title="http://www.usb.org"&gt;USB.org - Welcome&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;ID pin is absent in USB Type-C receptacle.&lt;/P&gt;&lt;P&gt;The determination of host or peripheral functionality is handled differently in Type-C.&lt;/P&gt;&lt;P&gt;Short description can be found on web, for example:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.synopsys.com/designware-ip/technical-bulletin/converting-existing-designs.html" title="https://www.synopsys.com/designware-ip/technical-bulletin/converting-existing-designs.html"&gt;Converting Existing USB Designs to Support Type-C Connections&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 11 Mar 2018 23:06:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748164#M116330</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-03-11T23:06:31Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748165#M116331</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are looking to implement a micro USB 3.0 OTG interface. We are able to implement the USB_ID detection functionality by pinmuxing GPIO1_10 into USB_ID mode, but our desire to use a dedicated USB_ID node from the USB PHY and spare GPIO1_10 for it are GPIO functionality.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The question is only regarding the USB_ID node.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;P.S.&lt;/P&gt;&lt;P&gt;Please clear assumed answered flag.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Mar 2018 07:17:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748165#M116331</guid>
      <dc:creator>gabriel_h</dc:creator>
      <dc:date>2018-03-13T07:17:24Z</dc:date>
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    <item>
      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748166#M116332</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Gaby&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;USB Type-C does not have USB_ID signal.&lt;/P&gt;&lt;P&gt;According to sect.11.1.1.1 Features i.MX8MDQ Reference Manual, &lt;BR /&gt;The USB 3.0 module includes the following features:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;OTG (on-the-go) 2.0 compliant, which includes both device and host capability.&lt;BR /&gt;Super-speed operation is not supported when OTG is enabled.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sect.11.1.2.6 OTG describes OTG for USB 3.0, and the programming requirements &lt;BR /&gt;for the USB 3.0 core in OTG mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fdocs%2Fen%2Freference-manual%2FIMX8MDQLQRM.pdf" rel="nofollow" target="_blank"&gt;https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Mar 2018 10:31:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748166#M116332</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-03-13T10:31:39Z</dc:date>
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      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748167#M116333</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regarding&lt;EM&gt; &lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;"OTG (on-the-go) 2.0 compliant, which includes both device and host capability.&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Super-speed operation is not supported when OTG is enabled." &lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How do I handle the USB_ID node derived from the USB PHY? Lets forget USB type C and USB3.0 support, and stick to the legacy USB2.0. NXP BSP uses GPIO1_10 alternative USB_ID signal instead of the didecated PHY signal. Why?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank You&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Mar 2018 09:16:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748167#M116333</guid>
      <dc:creator>gabriel_h</dc:creator>
      <dc:date>2018-03-15T09:16:25Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748168#M116334</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Gaby&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NXP BSP software&amp;nbsp;supports&amp;nbsp; MCIMX8M-EVK official NXP reference design - that is&lt;/P&gt;&lt;P&gt;USB type C. Other hardware alternatives, not present in i.MX8 reference design,&lt;/P&gt;&lt;P&gt;are not supported in BSP. You can add such software support yourself or apply&lt;/P&gt;&lt;P&gt;for help to NXP Professional Services:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE" title="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE"&gt;NXP Professional Services|NXP&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Mar 2018 09:49:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748168#M116334</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-03-15T09:49:57Z</dc:date>
    </item>
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      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748169#M116335</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I understand that but why you're avoiding to answer the direct question regarding the usage of GPIO1_10 instead of the dedicated USB_ID pin derived from the PHY? If the dedicated USB1_ID ball usage is not supported, that's ok too.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank You&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Mar 2018 11:23:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748169#M116335</guid>
      <dc:creator>gabriel_h</dc:creator>
      <dc:date>2018-03-15T11:23:09Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748170#M116336</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I see there is no answer. Can you please clear the "assumed answeres" flag from this topic?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank You&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Mar 2018 06:19:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748170#M116336</guid>
      <dc:creator>gabriel_h</dc:creator>
      <dc:date>2018-03-21T06:19:21Z</dc:date>
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      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748171#M116337</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Gaby:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I spent several days to dive into this problem to figure out the solution.&lt;/P&gt;&lt;P&gt;The implementation of USB 3.0 on i.mx8m is based on DWC3 from Synopsys.&lt;/P&gt;&lt;P&gt;There are two key points to implement OTG role switch:&lt;/P&gt;&lt;P&gt;1. OTG ID detection&lt;/P&gt;&lt;P&gt;2. Vbus switch&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There are several possible approaches to realize OTG role switch:&lt;/P&gt;&lt;P&gt;1. Utilize "extcon-usb-gpio.c" and use a GPIO pin as OTG ID:&lt;/P&gt;&lt;P&gt;When ID pin changes, extcon-usb-gpio will notify DWC3 core to switch the role of OTG.&lt;/P&gt;&lt;P&gt;The flaw is there is no hook to control VBUS power when ID pin detects role change.&lt;/P&gt;&lt;P&gt;You have to implement this part by yourself.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.&amp;nbsp; Use native OTG block:&lt;/P&gt;&lt;P&gt;You have to tweak drd driver(dual-role-device) under DWC3.&lt;/P&gt;&lt;P&gt;It requires to follow the "Programming flow for OTG in USB 3.0" to initialize OTG block.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="otg_block_initialization.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/23931iD5E117E8C4C65B64/image-size/large?v=v2&amp;amp;px=999" role="button" title="otg_block_initialization.png" alt="otg_block_initialization.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;It's lucky that an excellent developer already made it work on AM437X.&lt;/P&gt;&lt;DIV style="-en-clipboard: true;"&gt;&lt;A href="https://patchwork.kernel.org/project/LKML/list/?submitter=33442"&gt;https://patchwork.kernel.org/project/LKML/list/?submitter=33442&lt;/A&gt;&lt;/DIV&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I validate this also work on i.mx8m:&lt;/P&gt;&lt;P&gt;The patches i applied:&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(1) usb: dwc3: core: Power-off core/PHYs on system_suspend in host mode&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV style="-en-clipboard: true;"&gt;(2) [v2,1/2] usb: dwc3: core.h: add some register definitions&lt;/DIV&gt;&lt;DIV&gt;(3) [v2,2/2] usb: dwc3: add dual role support using OTG block&lt;/DIV&gt;&lt;DIV&gt;(4) [v2] usb: dwc3: Prevent indefinite sleep in _dwc3_set_mode during suspend/resume&lt;/DIV&gt;&lt;DIV&gt;(5) ARM: dts: am43xx: Enable dual-role mode for USB1&lt;/DIV&gt;&lt;DIV&gt;(6) usb: dwc3: core: Fix broken system suspend/resume on AM437x&lt;/DIV&gt;&lt;P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Then, you can add vbus control for the OTG controller based on usb2_generic_phy in DWC3.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But this solution isn't perfect. If you are interested, i'll tell you later.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;BR,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Richard&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Jun 2018 03:55:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748171#M116337</guid>
      <dc:creator>richard_hu</dc:creator>
      <dc:date>2018-06-07T03:55:00Z</dc:date>
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      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748172#M116338</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank You Richard&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will investigate this. This can help us a lot.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Jun 2018 11:33:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748172#M116338</guid>
      <dc:creator>gabriel_h</dc:creator>
      <dc:date>2018-06-18T11:33:11Z</dc:date>
    </item>
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      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748173#M116339</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Richard,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The OTG driver flow requires GHWPARAMS6.SRPSupport=TRUE before proceeding as described in reference manual. But in case of iMX8M SOC, It's false !!. So Is it really possible to support OTG role switch based on OTG ID in iMX8M ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Following steps describe overall programming flow as per reference manual:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. During global initialization, read the &lt;STRONG&gt;GHWPARAMS6&lt;/STRONG&gt; register to see if &lt;STRONG&gt;SRP&lt;/STRONG&gt; support&lt;BR /&gt;is enabled in the configured core. If SRP support is enabled, then proceed with the&lt;BR /&gt;OTG programming flow by programming USB_GCTL[PRTCAPDIR] as 2'b11. If&lt;BR /&gt;SRP support is not enabled, do not proceed further in the OTG programming flow.&lt;BR /&gt;&lt;STRONG&gt;The configured device must at least support SRP for cable connection-based&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;(Connector ID) role of operation.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. Initialize the ADP controller as explained in ADP programming flow.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3. The OTG 2.0 state machine is initially in B-IDLE if IDDIG is 1, or A-IDLE if&lt;BR /&gt;IDDIG is 0. Enable USB_OEVTEN[ConIDStsChngEvntEn] for any change in the&lt;BR /&gt;Connector ID status.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;4. Initialize the OTG control and configuration register to default values.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;5. Read the OSTS register to find out the current status of the Connector ID&lt;BR /&gt;(ConIDSts). After power-on or soft reset, the ConIDSts will be valid only after the&lt;BR /&gt;PHY delay from IDPULL=1 to IDDIG active and any filter delay for IDDIG inside&lt;BR /&gt;or outside the USB 3.0 core.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;6. If USB_OSTS[ConIDSts] is 1, the OTG 2.0 state machine is in B-IDLE, follow the&lt;BR /&gt;B-Device flow. Otherwise, if OTG 2.0 state machine is in A-IDLE, follow the A-&lt;BR /&gt;Device flow.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;7. When there is any connector ID (IDDIG) change resulting in&lt;BR /&gt;USB_OEVT[ConIDStsChngEvnt], then exit the A-Device/B-Device flow. Stop the&lt;BR /&gt;active driver and re-initialize the OTG control and status registers.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Jan 2020 11:11:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748173#M116339</guid>
      <dc:creator>Anonymous</dc:creator>
      <dc:date>2020-01-20T11:11:56Z</dc:date>
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      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748174#M116340</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Abhishek:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After i applied the patches, i can see the role switching happens.&lt;/P&gt;&lt;P&gt;----------------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;DIV style="-en-clipboard: true;"&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.345882] &lt;SPAN style="color: #ff0000;"&gt;---------&amp;gt; dwc3_otg_update - DWC3_OTG_ROLE_HOST&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.355893] Can't support &amp;gt; 32 bit dma.&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.361178] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.366745] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 3&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.378178] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220fe6c hci version 0x110 quirks 0x01010010&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.386972] xhci-hcd xhci-hcd.1.auto: irq 220, io mem 0x38100000&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.393708] hub 3-0:1.0: USB hub found&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.397546] hub 3-0:1.0: 1 port detected&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.401741] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.407301] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 4&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.415095] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.423787] hub 4-0:1.0: USB hub found&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.427621] hub 4-0:1.0: 1 port detected&lt;/DIV&gt;&lt;DIV&gt;[&amp;nbsp;&amp;nbsp;&amp;nbsp;55.431802] &lt;SPAN style="color: #ff0000;"&gt;---------&amp;gt; dwc3_otg_update - dwc3_host_init succeeds&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;----------------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;And i see the increment of interrupt counters:&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;DIV style="-en-clipboard: true;"&gt;# cat /proc/interrupts&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;CPU0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;CPU1&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;CPU2&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;CPU3&lt;/DIV&gt;&lt;DIV&gt;220:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;8&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0&amp;nbsp;&amp;nbsp;GPC-PSCI&amp;nbsp;&amp;nbsp;40 Edge&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;SPAN style="color: #ff0000;"&gt;dwc3-otg, xhci-hcd:usb3&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But it lacks the hook of configuring VBUS. So i implement it to get regulator "VBUS" and control it.&lt;/P&gt;&lt;P&gt;The host and device mode work.&lt;/P&gt;&lt;P&gt;I remember host mode has compatibility problem with USB 2.0 stick( i can't remember exactly the problem is USB 2.0 or USB 3.0 devices...it's already two years ago....)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Since we use type-C connector on our board and we don't want to spent too much time solving the state machine problem. Eventually, we change to use external type-C controller solution(TI TUSB320). (It still needs to tweak driver)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Richard&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Jan 2020 16:09:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748174#M116340</guid>
      <dc:creator>richard_hu</dc:creator>
      <dc:date>2020-01-20T16:09:51Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748175#M116341</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Richard,&lt;/P&gt;&lt;P&gt;Thank you for the information. Also GHWPARAMS6.SRPSupport is TRUE. I was reading 0xC154 which is GHWPARAMS5...my bad&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 Jan 2020 10:10:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748175#M116341</guid>
      <dc:creator>Anonymous</dc:creator>
      <dc:date>2020-01-21T10:10:25Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8m USB ID support</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748176#M116342</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Richard,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our design also use&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;TI TUSB320&amp;nbsp;&lt;SPAN&gt;external type-C controller, and the &lt;SPAN style="background-color: #ffffff;"&gt;TI TUSB320's&amp;nbsp;&lt;/SPAN&gt;ID pin is routed to&amp;nbsp;GPIO1_IO10 to config it as&amp;nbsp;USB1_OTG_ID.&amp;nbsp; Should we need to port&amp;nbsp;&lt;SPAN style="background-color: #ffffff;"&gt;TUSB320 linux driver to do the OTG detection or use "Use native OTG block"?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Terry Cheng&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Feb 2020 03:08:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8m-USB-ID-support/m-p/748176#M116342</guid>
      <dc:creator>terry_cheng</dc:creator>
      <dc:date>2020-02-17T03:08:38Z</dc:date>
    </item>
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