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    <title>i.MX ProcessorsのトピックRe: Accessing SRAM</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Accessing-SRAM/m-p/743199#M115627</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ranran&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;sram (ocram module) is defined in dts file since this is separate module requiring&lt;/P&gt;&lt;P&gt;some configuartion (for example enabling clocks) as&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ocram: sram@00905000 {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;compatible = "mmio-sram";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;reg = &amp;lt;0x00905000 0x3B000&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;clocks = &amp;lt;&amp;amp;clks IMX6QDL_CLK_OCRAM&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;};&lt;/P&gt;&lt;P&gt;&lt;A class="" href="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6q.dtsi?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga" title="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6q.dtsi?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga"&gt;linux-imx.git - i.MX Linux Kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;seems one can use memtool for accessing memory, in the same manner as to ddr,&lt;/P&gt;&lt;P&gt;examples of usage can be found in&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-95014"&gt;i.MX6Q PCIe EP/RC Validation System&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;for dev/mem usage one can look on&lt;/P&gt;&lt;P&gt;&lt;A class="" href="https://boundarydevices.com/i-mx5x-device-register-access/" title="https://boundarydevices.com/i-mx5x-device-register-access/"&gt;i.MX5x device register access - Boundary Devices&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 23 Jan 2018 08:06:48 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2018-01-23T08:06:48Z</dc:date>
    <item>
      <title>Accessing SRAM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Accessing-SRAM/m-p/743198#M115626</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I try to understand how to access SRAM with imx6.&lt;/P&gt;&lt;P&gt;I've seen previous post about accessing SRAM but it seems to deal only with how to define it in dts, not how to test its access&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/334365"&gt;i.mx28 on-chip SRAM&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I would like to ask:&lt;/P&gt;&lt;P&gt;1. Using other socs, it usually requires no specific driver, but it is a plain access to memory space. Is it really required to define it in dts in order to access the memory ? Is it required even if the access is only from userspace not kernel.&lt;/P&gt;&lt;P&gt;2. How do we test access to SRAM, is it by accessing the physical memory (using mmap or /dev/mem for example ) ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;ranran&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jan 2018 06:17:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Accessing-SRAM/m-p/743198#M115626</guid>
      <dc:creator>rans</dc:creator>
      <dc:date>2018-01-23T06:17:02Z</dc:date>
    </item>
    <item>
      <title>Re: Accessing SRAM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Accessing-SRAM/m-p/743199#M115627</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ranran&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;sram (ocram module) is defined in dts file since this is separate module requiring&lt;/P&gt;&lt;P&gt;some configuartion (for example enabling clocks) as&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ocram: sram@00905000 {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;compatible = "mmio-sram";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;reg = &amp;lt;0x00905000 0x3B000&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;clocks = &amp;lt;&amp;amp;clks IMX6QDL_CLK_OCRAM&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;};&lt;/P&gt;&lt;P&gt;&lt;A class="" href="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6q.dtsi?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga" title="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6q.dtsi?h=imx_4.1.15_2.0.0_ga&amp;amp;id=rel_imx_4.1.15_2.0.0_ga"&gt;linux-imx.git - i.MX Linux Kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;seems one can use memtool for accessing memory, in the same manner as to ddr,&lt;/P&gt;&lt;P&gt;examples of usage can be found in&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-95014"&gt;i.MX6Q PCIe EP/RC Validation System&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;for dev/mem usage one can look on&lt;/P&gt;&lt;P&gt;&lt;A class="" href="https://boundarydevices.com/i-mx5x-device-register-access/" title="https://boundarydevices.com/i-mx5x-device-register-access/"&gt;i.MX5x device register access - Boundary Devices&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jan 2018 08:06:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Accessing-SRAM/m-p/743199#M115627</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-01-23T08:06:48Z</dc:date>
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