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    <title>i.MX ProcessorsのトピックiMX7D RDC</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX7D-RDC/m-p/741810#M115481</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;With the RDC it's possible to assign ressources to the different cores.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is it possible to assigne interfaces which are on the same gpio bank to different cores?&lt;/P&gt;&lt;P&gt;example:&lt;/P&gt;&lt;P&gt;GPIO4 bank:&lt;/P&gt;&lt;P&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;I2C1 to M4 core&lt;/P&gt;&lt;P&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;I2C2 to A7 core&lt;/P&gt;&lt;P&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;ECSPI1 to A7 Core&lt;/P&gt;&lt;P&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;ECSPI2 to M4 core&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;all this interface are on the same GPIO bank. But assigned to different cores.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en"&gt;&lt;SPAN&gt;in my understanding, the interface can be assigned as you like, regardless of which gpio bank they are.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;only when allocating the GPIO,&amp;nbsp; one full bank (ex. GPIO4 Bank) at a time must be allocated.&lt;/SPAN&gt; &lt;SPAN&gt;However, regardless of the interface.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en"&gt;&lt;/SPAN&gt;&lt;SPAN lang="en"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 13 Feb 2018 09:40:12 GMT</pubDate>
    <dc:creator>rolfcrapp</dc:creator>
    <dc:date>2018-02-13T09:40:12Z</dc:date>
    <item>
      <title>iMX7D RDC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX7D-RDC/m-p/741810#M115481</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;With the RDC it's possible to assign ressources to the different cores.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is it possible to assigne interfaces which are on the same gpio bank to different cores?&lt;/P&gt;&lt;P&gt;example:&lt;/P&gt;&lt;P&gt;GPIO4 bank:&lt;/P&gt;&lt;P&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;I2C1 to M4 core&lt;/P&gt;&lt;P&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;I2C2 to A7 core&lt;/P&gt;&lt;P&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;ECSPI1 to A7 Core&lt;/P&gt;&lt;P&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;ECSPI2 to M4 core&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;all this interface are on the same GPIO bank. But assigned to different cores.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en"&gt;&lt;SPAN&gt;in my understanding, the interface can be assigned as you like, regardless of which gpio bank they are.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;only when allocating the GPIO,&amp;nbsp; one full bank (ex. GPIO4 Bank) at a time must be allocated.&lt;/SPAN&gt; &lt;SPAN&gt;However, regardless of the interface.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en"&gt;&lt;/SPAN&gt;&lt;SPAN lang="en"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Feb 2018 09:40:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX7D-RDC/m-p/741810#M115481</guid>
      <dc:creator>rolfcrapp</dc:creator>
      <dc:date>2018-02-13T09:40:12Z</dc:date>
    </item>
    <item>
      <title>Re: iMX7D RDC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX7D-RDC/m-p/741811#M115482</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi rolfcrapp&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you are right, &lt;SPAN lang="en"&gt;&lt;SPAN&gt;the interface can be assigned as you like, &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en"&gt;&lt;SPAN&gt;regardless of which gpio bank they are.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en"&gt;&lt;SPAN&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Feb 2018 23:12:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX7D-RDC/m-p/741811#M115482</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-02-19T23:12:32Z</dc:date>
    </item>
    <item>
      <title>Re: iMX7D RDC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX7D-RDC/m-p/1254856#M171870</link>
      <description>&lt;P&gt;您好！&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 请问每个GPIO引脚都可以单独分配给不同的核心吗？还是说在作为GPIO时，只能将gpiox bank整组分配？&lt;/P&gt;</description>
      <pubDate>Wed, 31 Mar 2021 08:48:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX7D-RDC/m-p/1254856#M171870</guid>
      <dc:creator>cyc583723081</dc:creator>
      <dc:date>2021-03-31T08:48:13Z</dc:date>
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