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    <title>i.MX ProcessorsのトピックiMX6UL SPI transfer speedup</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6UL-SPI-transfer-speedup/m-p/738136#M114870</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a small TFT display connected to my iMX6UL board and&amp;nbsp;I'm using the&amp;nbsp;SPI interface to transfer the data. I have everything working but I'm looking to increase the data transfer speed. The&amp;nbsp;SPI transfer is using DMA but when I look at the data transfer signals on a scope there is a significant gap between each 64-byte transfer. You can see this in the image below. A 64-byte transfer takes around 30uS and there is a 15uS gap before the next transfer takes place. This is all happening within the DMA transfer which is transferring&amp;nbsp; a total of 138240 bytes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does anybody have any ideas&amp;nbsp;on how to decrease this gap?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="spi transfer.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/765i43B23194E8146DE0/image-size/large?v=v2&amp;amp;px=999" role="button" title="spi transfer.jpg" alt="spi transfer.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Ian&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 09 May 2018 12:48:25 GMT</pubDate>
    <dc:creator>IanCraig</dc:creator>
    <dc:date>2018-05-09T12:48:25Z</dc:date>
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      <title>iMX6UL SPI transfer speedup</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6UL-SPI-transfer-speedup/m-p/738136#M114870</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a small TFT display connected to my iMX6UL board and&amp;nbsp;I'm using the&amp;nbsp;SPI interface to transfer the data. I have everything working but I'm looking to increase the data transfer speed. The&amp;nbsp;SPI transfer is using DMA but when I look at the data transfer signals on a scope there is a significant gap between each 64-byte transfer. You can see this in the image below. A 64-byte transfer takes around 30uS and there is a 15uS gap before the next transfer takes place. This is all happening within the DMA transfer which is transferring&amp;nbsp; a total of 138240 bytes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does anybody have any ideas&amp;nbsp;on how to decrease this gap?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="spi transfer.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/765i43B23194E8146DE0/image-size/large?v=v2&amp;amp;px=999" role="button" title="spi transfer.jpg" alt="spi transfer.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Ian&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 09 May 2018 12:48:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6UL-SPI-transfer-speedup/m-p/738136#M114870</guid>
      <dc:creator>IanCraig</dc:creator>
      <dc:date>2018-05-09T12:48:25Z</dc:date>
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