topic Re: spi4-slave register in i.MX Processors

spi4-slave register

leihe — Tue, 27 Mar 2018 08:05:22 GMT

I have a problem in spi driver ,platform is imx6D6AVT&&linux3.0.35,I can't get rx Interrupt when using spi4 as salve mode,the hardware connection is EIM_A25,EIM_D21,EIM_D22,,EIM_D28,so i mustchose SS1 as chip select? ECSPI4_CONREG:0x00f0e101; ECSPI4_CONFIGREG:0x00f00000; ECSPIx_INTREG=0xf8,is this config avalible?

I can only get TXFIFO Empty Interrupt,when ECSPIx_INTREG=0xff,so I write 0x1 to ECSPI4_TXDATA to stop it,if TXDATA buffer is not NULL,how can i start read bytes from master,by setting ECSPIx_CONREG xch bit with 1?

thank you!!!

Re: spi4-slave register

igorpadykov — Wed, 28 Mar 2018 06:09:48 GMT

Hi lei

one can check ERR009535 eCSPI: Burst completion by SS signal in slave mode is not functional

i.MX6DQ Errata

https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf

mainline slave support

[PATCH RFC 5/5] spi: imx: Add support for SPI Slave mode for imx53 and imx6 chips

Best regards
igor
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Re: spi4-slave register

leihe — Wed, 28 Mar 2018 06:46:12 GMT

thank you,so i can only use mosi miso pclk,is that right?