Multiplexed Address/Data Mode access timing for i.MX6DL

yuuki — Wed, 20 Dec 2017 01:06:08 GMT

Dear all,

We want to use Multiplexed Address/Data mode of EIM of i.MX6DL.
Because EIM_D[15:0] is used as other functions, we use only EIM_DA[15:0] as Address and Data signal of EIM.

We want to check connection and a timing of Multiplexed Address/Data Mode.
However, these contents are not explained in Reference Manual.

May I have a document explaining connection and a timing of Multiplexed Address/Data Mode?

Best Regards,
Yuuki

Re: Multiplexed Address/Data Mode access timing for i.MX6DL

Yuri — Wed, 20 Dec 2017 02:42:22 GMT

Hello,

Please use i.MX 6DL Datasheet. Section 4.9.3 [External Interface Module (EIM)]

of the linked below document, provides EIM hardware specs. In particular,
Table 41 (EIM Internal Module Multiplexing) shows connections. Timings may be found

on Figure 17 [Muxed Address/Data (A/D) Mode, Synchronous Write Access, WSC=6,ADVA=0, ADVN=1,

and ADH=1] and Figure 18 [16-Bit Muxed A/D Mode, Synchronous Read Access, WSC=7, RADVN=1,

ADH=1, OEA=0].

https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf

Have a great day,
Yuri

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topic Multiplexed Address/Data Mode access timing for i.MX6DL in i.MX Processors

Multiplexed Address/Data Mode access timing for i.MX6DL

Re: Multiplexed Address/Data Mode access timing for i.MX6DL