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    <title>topic IMX7 Yocto Linux: Sending/Receiving data over PCIE in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX7-Yocto-Linux-Sending-Receiving-data-over-PCIE/m-p/732727#M114041</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am using IMX7 with Yocto Linux. I built the BSP, loaded on SD card and run.&lt;/P&gt;&lt;P&gt;After linux booted, following info regarding PCIE appears on Terminal:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;33800000.pcie supply pcie-bus not found, using dummy regulator &lt;BR /&gt;imx6q-pcie 33800000.pcie: PCI host bridge to bus 0000:00 &lt;BR /&gt;pci_bus 0000:00: root bus resource [io 0x1000-0xffff] &lt;BR /&gt;pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fefffff] &lt;BR /&gt;pci_bus 0000:00: root bus resource [bus 00-ff] &lt;BR /&gt;PCI: bus0: Fast back to back transfers disabled &lt;BR /&gt;PCI: bus1: Fast back to back transfers disabled &lt;BR /&gt;pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x400fffff] &lt;BR /&gt;pci 0000:00:00.0: BAR 8: assigned [mem 0x40100000-0x401fffff] &lt;BR /&gt;pci 0000:00:00.0: BAR 6: assigned [mem 0x40200000-0x4020ffff pref] &lt;BR /&gt;pci 0000:01:00.0: BAR 0: assigned [mem 0x40100000-0x40101fff 64bit] &lt;BR /&gt;pci 0000:00:00.0: PCI bridge to [bus 01] &lt;BR /&gt;pci 0000:00:00.0: bridge window [mem 0x40100000-0x401fffff] &lt;BR /&gt;pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt &lt;BR /&gt;pci 0000:01:00.0: Signaling PME through PCIe PME interrupt&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When I run&amp;nbsp;lspci, then it appears as follows because I have currently connected a WIFI module for test:&lt;BR /&gt;00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) &lt;BR /&gt;01:00.0 Network controller: Intel Corporation Wireless 8260 (rev 3a)&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;and when I run menuconfig command&amp;nbsp;bitbake linux-phytec-fsl -c menuconfig&lt;/P&gt;&lt;P&gt;the PCIE kernel is also already selected as seen here:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; [*] PCI support │ │ &lt;BR /&gt; │ │ [*] Message Signaled Interrupts (MSI and MSI-X) │ │ &lt;BR /&gt; │ │ [ ] PCI Debugging │ │ &lt;BR /&gt; │ │ [ ] Enable PCI resource re-allocation detection │ │ &lt;BR /&gt; │ │ &amp;lt; &amp;gt; PCI Stub driver │ │ &lt;BR /&gt; │ │ [ ] PCI IOV support │ │ &lt;BR /&gt; │ │ [ ] PCI PRI support │ │ &lt;BR /&gt; │ │ [ ] PCI PASID support │ │ &lt;BR /&gt; │ │ PCI host controller drivers --- &lt;BR /&gt; -*- PCI Express Port Bus support │ │ &lt;BR /&gt; │ │ [*] Root Port Advanced Error Reporting support │ │ &lt;BR /&gt; │ │ [ ] PCI Express ECRC settings control │ │ &lt;BR /&gt; │ │ &amp;lt; &amp;gt; PCIe AER error injector support │ │ &lt;BR /&gt; │ │ [*] PCI Express ASPM control │ │ &lt;BR /&gt; │ │ [ ] Debug PCI Express ASPM │ │ &lt;BR /&gt; │ │ Default ASPM policy (BIOS default) ---&amp;gt; │ │ &lt;BR /&gt; │ │ &amp;lt; &amp;gt; PCCard (PCMCIA/CardBus) support ----&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now my aim is to send/receive data over PCIE to a XILINX kintex 7 FPGA.&lt;/P&gt;&lt;P&gt;What I didn't understand while running some application C code on IMX7, how it knows that the data is supposed to be transfer over PCIE. DO I need to include something in my application c code corresponding to PCIE, so that it knows that the transfer occur over PCIE and not over other interface?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one more thing when linux booted, it appears on Terminal always at the end:&lt;/P&gt;&lt;P&gt;random: nonblocking pool is initialized&lt;/P&gt;&lt;P&gt;What is that mean?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 09 Feb 2018 09:57:37 GMT</pubDate>
    <dc:creator>imx7newbie</dc:creator>
    <dc:date>2018-02-09T09:57:37Z</dc:date>
    <item>
      <title>IMX7 Yocto Linux: Sending/Receiving data over PCIE</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX7-Yocto-Linux-Sending-Receiving-data-over-PCIE/m-p/732727#M114041</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am using IMX7 with Yocto Linux. I built the BSP, loaded on SD card and run.&lt;/P&gt;&lt;P&gt;After linux booted, following info regarding PCIE appears on Terminal:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;33800000.pcie supply pcie-bus not found, using dummy regulator &lt;BR /&gt;imx6q-pcie 33800000.pcie: PCI host bridge to bus 0000:00 &lt;BR /&gt;pci_bus 0000:00: root bus resource [io 0x1000-0xffff] &lt;BR /&gt;pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fefffff] &lt;BR /&gt;pci_bus 0000:00: root bus resource [bus 00-ff] &lt;BR /&gt;PCI: bus0: Fast back to back transfers disabled &lt;BR /&gt;PCI: bus1: Fast back to back transfers disabled &lt;BR /&gt;pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x400fffff] &lt;BR /&gt;pci 0000:00:00.0: BAR 8: assigned [mem 0x40100000-0x401fffff] &lt;BR /&gt;pci 0000:00:00.0: BAR 6: assigned [mem 0x40200000-0x4020ffff pref] &lt;BR /&gt;pci 0000:01:00.0: BAR 0: assigned [mem 0x40100000-0x40101fff 64bit] &lt;BR /&gt;pci 0000:00:00.0: PCI bridge to [bus 01] &lt;BR /&gt;pci 0000:00:00.0: bridge window [mem 0x40100000-0x401fffff] &lt;BR /&gt;pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt &lt;BR /&gt;pci 0000:01:00.0: Signaling PME through PCIe PME interrupt&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When I run&amp;nbsp;lspci, then it appears as follows because I have currently connected a WIFI module for test:&lt;BR /&gt;00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) &lt;BR /&gt;01:00.0 Network controller: Intel Corporation Wireless 8260 (rev 3a)&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;and when I run menuconfig command&amp;nbsp;bitbake linux-phytec-fsl -c menuconfig&lt;/P&gt;&lt;P&gt;the PCIE kernel is also already selected as seen here:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; [*] PCI support │ │ &lt;BR /&gt; │ │ [*] Message Signaled Interrupts (MSI and MSI-X) │ │ &lt;BR /&gt; │ │ [ ] PCI Debugging │ │ &lt;BR /&gt; │ │ [ ] Enable PCI resource re-allocation detection │ │ &lt;BR /&gt; │ │ &amp;lt; &amp;gt; PCI Stub driver │ │ &lt;BR /&gt; │ │ [ ] PCI IOV support │ │ &lt;BR /&gt; │ │ [ ] PCI PRI support │ │ &lt;BR /&gt; │ │ [ ] PCI PASID support │ │ &lt;BR /&gt; │ │ PCI host controller drivers --- &lt;BR /&gt; -*- PCI Express Port Bus support │ │ &lt;BR /&gt; │ │ [*] Root Port Advanced Error Reporting support │ │ &lt;BR /&gt; │ │ [ ] PCI Express ECRC settings control │ │ &lt;BR /&gt; │ │ &amp;lt; &amp;gt; PCIe AER error injector support │ │ &lt;BR /&gt; │ │ [*] PCI Express ASPM control │ │ &lt;BR /&gt; │ │ [ ] Debug PCI Express ASPM │ │ &lt;BR /&gt; │ │ Default ASPM policy (BIOS default) ---&amp;gt; │ │ &lt;BR /&gt; │ │ &amp;lt; &amp;gt; PCCard (PCMCIA/CardBus) support ----&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now my aim is to send/receive data over PCIE to a XILINX kintex 7 FPGA.&lt;/P&gt;&lt;P&gt;What I didn't understand while running some application C code on IMX7, how it knows that the data is supposed to be transfer over PCIE. DO I need to include something in my application c code corresponding to PCIE, so that it knows that the transfer occur over PCIE and not over other interface?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one more thing when linux booted, it appears on Terminal always at the end:&lt;/P&gt;&lt;P&gt;random: nonblocking pool is initialized&lt;/P&gt;&lt;P&gt;What is that mean?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 09 Feb 2018 09:57:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX7-Yocto-Linux-Sending-Receiving-data-over-PCIE/m-p/732727#M114041</guid>
      <dc:creator>imx7newbie</dc:creator>
      <dc:date>2018-02-09T09:57:37Z</dc:date>
    </item>
    <item>
      <title>Re: IMX7 Yocto Linux: Sending/Receiving data over PCIE</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX7-Yocto-Linux-Sending-Receiving-data-over-PCIE/m-p/732728#M114042</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Newbie&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;simple pcie tests can be found on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-95014"&gt;i.MX6Q PCIe EP/RC Validation System&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;NXP linux PCIe driver is described in attached Linux Manual&lt;/P&gt;&lt;P&gt;Chapter 40 PCI Express Root Complex Driver&lt;/P&gt;&lt;P&gt;general linux errors explanation can be found by googling, like:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://forums.xilinx.com/t5/Embedded-Linux/random-nonblocking-pool-is-initialized/td-p/739759" title="https://forums.xilinx.com/t5/Embedded-Linux/random-nonblocking-pool-is-initialized/td-p/739759"&gt;Solved: random: nonblocking pool is initialized - Community Forums&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 09 Feb 2018 23:20:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX7-Yocto-Linux-Sending-Receiving-data-over-PCIE/m-p/732728#M114042</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-02-09T23:20:46Z</dc:date>
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