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    <title>i.MX ProcessorsのトピックRe: IMX7 Dual and solo - RAM porting in u-boot</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX7-Dual-and-solo-RAM-porting-in-u-boot/m-p/732650#M114038</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Gopinath&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. changing file is performed manually, unfortunately there is no tool for that&lt;/P&gt;&lt;P&gt;2. yes one can use the same programming aid tool for solo&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 19 Dec 2017 23:29:11 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2017-12-19T23:29:11Z</dc:date>
    <item>
      <title>IMX7 Dual and solo - RAM porting in u-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX7-Dual-and-solo-RAM-porting-in-u-boot/m-p/732649#M114037</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am working on porting two custom boards which uses IMX7 dual and solo with LPDDR3. I am following&amp;nbsp;&lt;A href="https://community.nxp.com/docs/DOC-152468"&gt;i.MX7D DRAM Register Programming Aid&lt;/A&gt;&amp;nbsp;document for porting u-boot for LPDDR3. I have downloaded&amp;nbsp;&lt;SPAN style="color: #5e89c1; background-color: #efefef; font-weight: 600;"&gt;MX7D_LPDDR3_register_programming_aid_v1_4.xlsx&lt;/SPAN&gt;&amp;nbsp;document and configured the settings from my DRAM data sheets. Now I have the updated dstream.ds file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now below are my questions.&amp;nbsp;&lt;/P&gt;&lt;P&gt;1. u-boot requires&amp;nbsp;&lt;STRONG&gt;imximage.cfg as DCD structure for&lt;/STRONG&gt;&amp;nbsp;DRAM configuration. How to port this file (&lt;STRONG&gt;imximage.cfg&lt;/STRONG&gt;)&amp;nbsp;from dstream.ds file? Any tools available ? or I need to do it manually?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. It seems &lt;STRONG&gt;MX7D_LPDDR3_register_programming_aid_v1_4.xlsx&lt;/STRONG&gt; file is only for IMX7 Dual.(not sure). Why because when I referred warp7 development board which uses &amp;nbsp;IMX7 solo, the&amp;nbsp;&lt;STRONG&gt;imximage.cfg address values are different.&amp;nbsp;&lt;/STRONG&gt;For example, please refer difference between dual and solo cfg files. But when I checked the .ds file all the addresses are matching&amp;nbsp;with IMX7 dual cfg files from sabreSD. &amp;nbsp;So shall I use the same programming aid tool for solo ? or do I need a different one?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;IMX7 Dual cfg file from SabreSD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/*&lt;BR /&gt; * Device Configuration Data (DCD)&lt;BR /&gt; *&lt;BR /&gt; * Each entry must have the format:&lt;BR /&gt; * Addr-type Address Value&lt;BR /&gt; *&lt;BR /&gt; * where:&lt;BR /&gt; * Addr-type register length (1,2 or 4 bytes)&lt;BR /&gt; * Address absolute address of the register&lt;BR /&gt; * value value to be stored in the register&lt;BR /&gt; */&lt;/P&gt;&lt;P&gt;DATA 4 0x30340004 0x4F400005&lt;BR /&gt;/* Clear then set bit30 to ensure exit from DDR retention */&lt;BR /&gt;DATA 4 0x30360388 0x40000000&lt;BR /&gt;DATA 4 0x30360384 0x40000000&lt;/P&gt;&lt;P&gt;DATA 4 0x30391000 0x00000002&lt;BR /&gt;DATA 4 0x307a0000 0x01040001&lt;BR /&gt;DATA 4 0x307a01a0 0x80400003&lt;BR /&gt;DATA 4 0x307a01a4 0x00100020&lt;BR /&gt;DATA 4 0x307a01a8 0x80100004&lt;BR /&gt;............&lt;/P&gt;&lt;P&gt;DATA 4 0x307900c0 0x0e407304&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;DATA 4 0x30384130 0x00000000&lt;BR /&gt;DATA 4 0x30340020 0x00000178&lt;BR /&gt;DATA 4 0x30384130 0x00000002&lt;BR /&gt;DATA 4 0x30790018 0x0000000f&lt;/P&gt;&lt;P&gt;CHECK_BITS_SET 4 0x307a0004 0x&lt;/P&gt;&lt;P&gt;#endif&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;In case of warp7 board (IMX7 Solo)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;/*&lt;BR /&gt; * Device Configuration Data (DCD)&lt;BR /&gt; *&lt;BR /&gt; * Each entry must have the format:&lt;BR /&gt; * Addr-type Address Value&lt;BR /&gt; *&lt;BR /&gt; * where:&lt;BR /&gt; * Addr-type register length (1,2 or 4 bytes)&lt;BR /&gt; * Address absolute address of the register&lt;BR /&gt; * value value to be stored in the register&lt;BR /&gt; */&lt;BR /&gt;DATA 4 0x020c4018 0x00260324&lt;/P&gt;&lt;P&gt;DATA 4 0x020c4068 0xffffffff&lt;BR /&gt;DATA 4 0x020c406c 0xffffffff&lt;BR /&gt;DATA 4 0x020c4070 0xffffffff&lt;BR /&gt;DATA 4 0x020c4074 0xffffffff&lt;BR /&gt;DATA 4 0x020c4078 0xffffffff&lt;BR /&gt;DATA 4 0x020c407c 0xffffffff&lt;BR /&gt;DATA 4 0x020c4080 0xffffffff&lt;/P&gt;&lt;P&gt;DATA 4 0x020e0344 0x00003030&lt;BR /&gt;DATA 4 0x020e0348 0x00003030&lt;BR /&gt;DATA 4 0x020e034c 0x00003030&lt;BR /&gt;DATA 4 0x020e0350 0x00003030&lt;BR /&gt;DATA 4 0x020e030c 0x00000030&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DATA 4 0x021b0004 0x00025564&lt;BR /&gt;DATA 4 0x021b0404 0x00011006&lt;BR /&gt;DATA 4 0x021b001c 0x0000000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please give me your valuable suggestions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Gopinath S&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Dec 2017 12:20:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX7-Dual-and-solo-RAM-porting-in-u-boot/m-p/732649#M114037</guid>
      <dc:creator>gopinathsriniva</dc:creator>
      <dc:date>2017-12-19T12:20:00Z</dc:date>
    </item>
    <item>
      <title>Re: IMX7 Dual and solo - RAM porting in u-boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX7-Dual-and-solo-RAM-porting-in-u-boot/m-p/732650#M114038</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Gopinath&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. changing file is performed manually, unfortunately there is no tool for that&lt;/P&gt;&lt;P&gt;2. yes one can use the same programming aid tool for solo&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Dec 2017 23:29:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX7-Dual-and-solo-RAM-porting-in-u-boot/m-p/732650#M114038</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-12-19T23:29:11Z</dc:date>
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