i.MX ProcessorsのトピックRe: PF0100 Default configuration https://community.nxp.com/t5/i-MX-Processors/PF0100-Default-configuration/m-p/731942#M113896 <HTML><HEAD></HEAD><BODY><DIV>Please see the datasheet page19 The default setting is level&nbsp;sensitive&nbsp;</DIV></BODY></HTML> Tue, 31 Oct 2017 05:22:19 GMT guoweisun 2017-10-31T05:22:19Z PF0100 Default configuration https://community.nxp.com/t5/i-MX-Processors/PF0100-Default-configuration/m-p/731941#M113895 <HTML><HEAD></HEAD><BODY><P>PWRON signal is used to turn on PMIC. It can be&nbsp;<SPAN class="">configured to detect a level, or an edge using the PWRON_CFG<BR />bit as below. What's the default configuration of PWRON_CFG? 0 or 1?</SPAN></P><P><SPAN class=""><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/9647iEE51616B31682B6C/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /></span></SPAN></P></BODY></HTML> Mon, 30 Oct 2017 03:37:18 GMT https://community.nxp.com/t5/i-MX-Processors/PF0100-Default-configuration/m-p/731941#M113895 houdenglv 2017-10-30T03:37:18Z Re: PF0100 Default configuration https://community.nxp.com/t5/i-MX-Processors/PF0100-Default-configuration/m-p/731942#M113896 <HTML><HEAD></HEAD><BODY><DIV>Please see the datasheet page19 The default setting is level&nbsp;sensitive&nbsp;</DIV></BODY></HTML> Tue, 31 Oct 2017 05:22:19 GMT https://community.nxp.com/t5/i-MX-Processors/PF0100-Default-configuration/m-p/731942#M113896 guoweisun 2017-10-31T05:22:19Z