i.MX ProcessorsのトピックRe: i.mx6ul CSI receive interlace ccir656 video issue

i.mx6ul CSI receive interlace ccir656 video issue

frank_chiang — Fri, 13 Apr 2018 11:35:24 GMT

hi guys,

Now I'm developing a project based on imx6ul and using csi driver example from SDK not linux version. My hardware looks like below illustration.

analog camera -> TW9900(ccir656 720x480 out) -> imx6ul csi -> imx6 pxp -> ch7026 -> cvbs out

I already verified this path "imx6 pxp -> ch7026 -> cvbs out" by inputting fixed color array data and it works fine.

But when I use CSI function to get video data from tw9900 connecting with an analog camera, cvbs out can't show stable video on the monitor as below.

I check with TW9900 FAE, he feedbacks me below information

ITU-R BT.656 for the 525-line system has 244 video active lines
in odd field and 243 video active lines in even field.
TW9900 doesn’t do any de-interlacing and its output is interlaced.

I also check CSI example code from SDK, it mentions below.

CSI work mode: The CCIR656 interlace mode is not supported currently.:smileycry:

How can I solve this issue?

TW9900 only outputs interlace mode but imx6 doesn't support interlace mode.

Does anyone know how to setting interlace mode on imx6 CSI function?

Re: i.mx6ul CSI receive interlace ccir656 video issue

igorpadykov — Sun, 15 Apr 2018 22:49:19 GMT

Hi frank

I am not aware of non-linux CSI CCIR656 interlace mode examples,

in general one can check description in Reference Manual of

CSI_CSICR18 bit BIT_DEINTERLACE_EN, setting stride
DEINTERLACE_STRIDE register CSI_CSIFBUF_PARA, and can look at
driver sorces in linux/drivers/media/platform/mxc/subdev/mx6s_capture.c

mx6s_capture.c\subdev\mxc\platform\media\drivers - linux-imx - i.MX Linux kernel

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

Re: i.mx6ul CSI receive interlace ccir656 video issue

Danube — Mon, 16 Apr 2018 12:22:10 GMT

Hi Igorpadykov,

WE had check this patch code

https://community.nxp.com/servlet/JiveServlet/download/938610-1-408901/0001-Enable-CSI-support-BT656-interlace-and-add-a…

WE know ADV7180 is work in interlace mode.

But we don't seet bit27 set to 1 in CSI_CSICR1 REG

Does any CCIR656 interlace step by step guide ?

Re: i.mx6ul CSI receive interlace ccir656 video issue

frank_chiang — Mon, 16 Apr 2018 19:04:18 GMT

Hi igorpadykov,

I try to set some bits as below. But it still doesn't work.

BTW, TW9900 uses 27MHz external crystal. Originally EVB uses OV5640 and it use24MHz.

Do you have any idea how solve this issue?

1. CSI_CSICR1

bit27 => 1

2. CSI_CSIFBBUF_PARA

bit 31-16 : (720*2) / 8

bit 15-0 : (720*2) / 8

3.CSI_CSICR18

bit2 : 1

Re: i.mx6ul CSI receive interlace ccir656 video issue

frank_chiang — Mon, 16 Apr 2018 19:58:59 GMT

Hi Igorpadykov,

It's mention of deinterlacing function in the specification as below.

So I think just need setting some registers. But I totally have not idea how to do it.

Re: i.mx6ul CSI receive interlace ccir656 video issue

igorpadykov — Tue, 17 Apr 2018 08:47:00 GMT

Hi frank

had you tried ADV7180 patch.

Unfortunately I am not aware of additional documentation for CSI

deinterlacing registers.

Best regards
igor

Re: i.mx6ul CSI receive interlace ccir656 video issue

frank_chiang — Tue, 17 Apr 2018 18:24:26 GMT

hi igorpadykov

Yes, I have tried the ADV7180 patch to use the different settings on my platform.

I find out some confusing registers setting as below. But I can't get more information about this register.

Where can I get more information about register setting?

Re: i.mx6ul CSI receive interlace ccir656 video issue

dh29 — Mon, 02 Jul 2018 14:32:12 GMT

Hi Frank,

Did you manage to get the interlaced video input working? I am using the ADV7280M with an iMX7 (doesn't have an IPU) and have reached a similar issue. I can get a stable image using a PAL camera input, but only when CCIR is NOT enabled. The problem is that I get 2 images, one on top of each other, due to the interlaced video. When I try and enable CCIR / Interlaced mode everything stops and I can't capture anything.

Re: i.mx6ul CSI receive interlace ccir656 video issue

hoanganh — Tue, 27 Jul 2021 18:57:05 GMT

@frank_chiang

I had success capture video interlaced ccir656. But how to control imx6 pxp to output analog video like your image?

Thanks