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    <title>topic Re: IMX6 PCIe link up problem in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729533#M113455</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Amna&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;what sdk used in the case, is it possible to provide link.&lt;/P&gt;&lt;P&gt;Basic PCIe test steps are described in&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-95014"&gt;i.MX6Q PCIe EP/RC Validation System&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Also one can test with nxp linux bsps described on&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fsupport%2Fdeveloper-resources%2Frun-time-software%2Fi.mx-developer-resources%2Fi.mx-6series-i.mx-7series-software-and-development-tool-resources%3AIMX_SW" rel="nofollow" target="_blank"&gt;https://www.nxp.com/support/developer-resources/run-time-software/i.mx-developer-resources/i.mx-6series-i.mx-7series-software-and-development-tool-resources:IMX_SW&lt;/A&gt;&lt;/P&gt;&lt;P&gt;recommended to test several pcie cards.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 08 Feb 2018 22:57:38 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2018-02-08T22:57:38Z</dc:date>
    <item>
      <title>IMX6 PCIe link up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729532#M113454</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am writing a driver for PCI express (RC mode) on IMX6 (var-som-mx6). I have successfully enabled the clock and have access to PCIe registers. But I cannot link up the port. I followed the steps in imx6 SDK except for two parts&lt;/P&gt;&lt;P&gt;1- In the SDK, external oscillator is being used to provide the clock to the PCIe module whereas I have used internal&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;clock&lt;/P&gt;&lt;P&gt;2 - There was a step to enable 3.3v for PCI mini by making a GPIO high. I couldn't find which pin it was and also I &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;checked the voltages on PCI mini connector on the board and all of the voltages were there, so I am assuming that&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; we don't require this step for my board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After trying a lot I looked at the Linux&amp;nbsp;driver for IMX6. It does all of the configuration being done in SDK along with some extra things like setting the number of lanes and speed of the link, setting bus number, BARs, memory base and limit etc. It also forces Gen1 operation before starting the link.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried both but I am not successful. Also, I have searched a lot, looked at the PCI specifications document, imx6 reference manual, tried EP mode etc but haven't found anything that helped me. I am writing the PCI driver for the first time and also haven't worked with Phy before.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;I will really appreciate if anybody can help me.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Amna&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 08 Feb 2018 14:05:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729532#M113454</guid>
      <dc:creator>amnatehreem</dc:creator>
      <dc:date>2018-02-08T14:05:56Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6 PCIe link up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729533#M113455</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Amna&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;what sdk used in the case, is it possible to provide link.&lt;/P&gt;&lt;P&gt;Basic PCIe test steps are described in&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-95014"&gt;i.MX6Q PCIe EP/RC Validation System&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Also one can test with nxp linux bsps described on&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fsupport%2Fdeveloper-resources%2Frun-time-software%2Fi.mx-developer-resources%2Fi.mx-6series-i.mx-7series-software-and-development-tool-resources%3AIMX_SW" rel="nofollow" target="_blank"&gt;https://www.nxp.com/support/developer-resources/run-time-software/i.mx-developer-resources/i.mx-6series-i.mx-7series-software-and-development-tool-resources:IMX_SW&lt;/A&gt;&lt;/P&gt;&lt;P&gt;recommended to test several pcie cards.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 08 Feb 2018 22:57:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729533#M113455</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-02-08T22:57:38Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6 PCIe link up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729534#M113456</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your reply. I am using the SDK provided in this link.&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/ted-juan/iMX6_Platform_SDK" title="https://github.com/ted-juan/iMX6_Platform_SDK"&gt;GitHub - ted-juan/iMX6_Platform_SDK: Freescale iMX6 SDK&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have the correct test setup and I also used multiple pcie&amp;nbsp;cards including PCIe base USB host controller, ethernet cards and SSD drive but the link does not go up with any of them.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I don't have any experience with building and debugging linux&amp;nbsp;so that will be very time consuming. I would really appreciate if someone can help me with the link up without having to build linux.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Amna&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 09 Feb 2018 04:46:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729534#M113456</guid>
      <dc:creator>amnatehreem</dc:creator>
      <dc:date>2018-02-09T04:46:50Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6 PCIe link up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729535#M113457</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Amna&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can try attached sdk example.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 09 Feb 2018 08:29:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729535#M113457</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-02-09T08:29:41Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6 PCIe link up problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729536#M113458</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you. I was not enabling the differential clock for the PCIe (CLK1_N and CLK1_P). I got the link up after enabling this clock.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Amna&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Feb 2018 12:29:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6-PCIe-link-up-problem/m-p/729536#M113458</guid>
      <dc:creator>amnatehreem</dc:creator>
      <dc:date>2018-02-14T12:29:07Z</dc:date>
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