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    <title>topic Question, i.MX6Q IRQ handling(Linux) in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6Q-IRQ-handling-Linux/m-p/729523#M113450</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about IRQ of i.MX6 on Linux.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Now my customer is using GPIO (GPIO(1,30)) of i.MX6Q as IRQ input on Linux(3.14.28).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;And they saw IRQ#190 is used for that. They found that from the result of issuing “cat /proc/interrupts” command.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Because they want to assign the IRQ#190 into other CPU core, CPU-1, they issued “echo 2&amp;gt; /proc/irq/190/smp_affinity”.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Then error occurred as below.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;-sh : echo : write error : Input/output error&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;They feel the IRQ#190 might be incorrect.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Please show me how to assign the IRQ to other CPU core.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;And please show us how to change the priority of IRQ also.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Miyamoto&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 29 Oct 2017 23:26:03 GMT</pubDate>
    <dc:creator>SLICE</dc:creator>
    <dc:date>2017-10-29T23:26:03Z</dc:date>
    <item>
      <title>Question, i.MX6Q IRQ handling(Linux)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6Q-IRQ-handling-Linux/m-p/729523#M113450</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about IRQ of i.MX6 on Linux.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Now my customer is using GPIO (GPIO(1,30)) of i.MX6Q as IRQ input on Linux(3.14.28).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;And they saw IRQ#190 is used for that. They found that from the result of issuing “cat /proc/interrupts” command.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Because they want to assign the IRQ#190 into other CPU core, CPU-1, they issued “echo 2&amp;gt; /proc/irq/190/smp_affinity”.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Then error occurred as below.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;-sh : echo : write error : Input/output error&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;They feel the IRQ#190 might be incorrect.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Please show me how to assign the IRQ to other CPU core.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;And please show us how to change the priority of IRQ also.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Miyamoto&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 29 Oct 2017 23:26:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6Q-IRQ-handling-Linux/m-p/729523#M113450</guid>
      <dc:creator>SLICE</dc:creator>
      <dc:date>2017-10-29T23:26:03Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX6Q IRQ handling(Linux)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6Q-IRQ-handling-Linux/m-p/729524#M113451</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My customer found the actual IRQ# on the Linux kernel 3.14.28.&lt;/P&gt;&lt;P&gt;The IRQ from GPIO1_30 is assigned to #99.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, we can close this.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Nov 2017 07:51:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX6Q-IRQ-handling-Linux/m-p/729524#M113451</guid>
      <dc:creator>SLICE</dc:creator>
      <dc:date>2017-11-01T07:51:19Z</dc:date>
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