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    <title>i.MX Processors中的主题 Re: Using Segger JLinkExe to halt / resume IMX6ULL?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Using-Segger-JLinkExe-to-halt-resume-IMX6ULL/m-p/729050#M113357</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; U-boot generally is not position independent, therefore this is not good idea to load&lt;/P&gt;&lt;P&gt;simultaneously "old" and "new" U-boots.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 27 Mar 2018 04:15:10 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2018-03-27T04:15:10Z</dc:date>
    <item>
      <title>Using Segger JLinkExe to halt / resume IMX6ULL?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-Segger-JLinkExe-to-halt-resume-IMX6ULL/m-p/729048#M113355</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using the IMX6ULL and was curious if anyone else has observed this scenario?...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Attach Segger JLink Plus to IMX6ULL JTAG interface&lt;/P&gt;&lt;P&gt;2. Power up IMX6ULL&lt;/P&gt;&lt;P&gt;3. Allow 1st stage program loading efforts to stream u-Boot from SPI NOR into DDR &lt;EM&gt;(or other start-up media if not using SPI NOR)&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;4. Allow IMX6ULL to begin executing the existing SPI NOR originated u-boot from DDR&amp;nbsp;&lt;EM&gt;(or other start-up media if not using SPI NOR)&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;5. Use JLinkExe to issue 'h' - halt command&lt;/P&gt;&lt;P&gt;6. Use JLinkExe command 'loadbin' with a new u-boot.bin image beginning from the 1st u-boot.bin instruction address through the end of the new u-boot image&lt;/P&gt;&lt;P&gt;7. Use JLinkExe to issue 'setPC' - set Program Counter command to set the program counter to the 1st instruction in the new u-boot.bin file, which was loaded via JTAG.&lt;/P&gt;&lt;P&gt;8. Use JlinkExe to issue 'g' - Go command&lt;/P&gt;&lt;P&gt;9. Monitor IMX6ULL debug UART traffic to observe the execution response of u-boot&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;....what I'm seeing is -&amp;gt; the u-boot 'ver' command hints that the actual u-boot version being run following the above sequence is the older u-boot image. So... to me it hints the target is re-running 1st stage program loading efforts and re-streaming the old u-boot.bin image into DDR after step '8.' in the sequence above.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And... if this theory is correct - &amp;gt;1st stage program loading is re-run after step '8.' above?... Is there a way to sequence IMX6ULL execution control such that a new u-boot.bin image can be streamed into DDR over JTAG without subsequently watching it get blown away by a re-execution of 1st stage program re-re-loading efforts?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks much in advance!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;--DJ Regan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Mar 2018 22:07:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-Segger-JLinkExe-to-halt-resume-IMX6ULL/m-p/729048#M113355</guid>
      <dc:creator>djregan</dc:creator>
      <dc:date>2018-03-22T22:07:06Z</dc:date>
    </item>
    <item>
      <title>Re: Using Segger JLinkExe to halt / resume IMX6ULL?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-Segger-JLinkExe-to-halt-resume-IMX6ULL/m-p/729049#M113356</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Plan B... I was able to control 'which?' u-boot image by placing IMX6ULL in 'Serial Download' mode (via boot mode select pins)... then use Segger JLinkExe to control which version of u-boot is in DDR. That works. Above concerns are now a non-issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please consider my question as 'Answered'. :smileyhappy:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks much...&lt;/P&gt;&lt;P&gt;--DJ Regan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Mar 2018 16:25:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-Segger-JLinkExe-to-halt-resume-IMX6ULL/m-p/729049#M113356</guid>
      <dc:creator>djregan</dc:creator>
      <dc:date>2018-03-23T16:25:30Z</dc:date>
    </item>
    <item>
      <title>Re: Using Segger JLinkExe to halt / resume IMX6ULL?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-Segger-JLinkExe-to-halt-resume-IMX6ULL/m-p/729050#M113357</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; U-boot generally is not position independent, therefore this is not good idea to load&lt;/P&gt;&lt;P&gt;simultaneously "old" and "new" U-boots.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 27 Mar 2018 04:15:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-Segger-JLinkExe-to-halt-resume-IMX6ULL/m-p/729050#M113357</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-03-27T04:15:10Z</dc:date>
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