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    <title>topic Off-Chip Trace i.MX258 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Off-Chip-Trace-i-MX258/m-p/727872#M113213</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV class=""&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm looking for information or documents that tell me how to use the trace feature on i.MX258.&lt;/P&gt;&amp;nbsp;&lt;P&gt;I would like in my case to make code coverage. I think the best solution is to use the trace port unit. However, I can not find the port to use and the pins.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is it possible to recover the traces with for example the LAUTERBACH Off-Chip Trace Solution probe ?&lt;BR /&gt;Is the trace port available and if so where can I find the pins?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your help&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Cordially&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 12 Apr 2018 14:54:02 GMT</pubDate>
    <dc:creator>guillaume17</dc:creator>
    <dc:date>2018-04-12T14:54:02Z</dc:date>
    <item>
      <title>Off-Chip Trace i.MX258</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Off-Chip-Trace-i-MX258/m-p/727872#M113213</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV class=""&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm looking for information or documents that tell me how to use the trace feature on i.MX258.&lt;/P&gt;&amp;nbsp;&lt;P&gt;I would like in my case to make code coverage. I think the best solution is to use the trace port unit. However, I can not find the port to use and the pins.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is it possible to recover the traces with for example the LAUTERBACH Off-Chip Trace Solution probe ?&lt;BR /&gt;Is the trace port available and if so where can I find the pins?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your help&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Cordially&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Apr 2018 14:54:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Off-Chip-Trace-i-MX258/m-p/727872#M113213</guid>
      <dc:creator>guillaume17</dc:creator>
      <dc:date>2018-04-12T14:54:02Z</dc:date>
    </item>
    <item>
      <title>Re: Off-Chip Trace i.MX258</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Off-Chip-Trace-i-MX258/m-p/727873#M113214</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi guillaume,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;1.The i.MX25 ETM pins are multiplexed with peripheral pins including NFC, CSPI1, etc.,so when they are used for ETM other (mux) options will not be available.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;2.ETM is an ARM debug feature, it may be recommended to apply to ETM and ETB documentation on the ARM website. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;3.Please review the ETB erratum for i.MX25 in the Errata. &amp;nbsp;&amp;lt; &lt;A href="http://cache.freescale.com/files/dsp/doc/errata/IMX25CE.pdfÂ"&gt;http://cache.freescale.com/files/dsp/doc/errata/IMX25CE.pdf&amp;nbsp;&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt; 4.Also please pay attention :Section 6.1.3 (Capture rates) of the ICE and &lt;STRONG&gt;TRACE&lt;/STRONG&gt; User Guide states : &amp;nbsp;"The ETM on the target board can output 4, 8, or 16 &lt;STRONG&gt;trace&lt;/STRONG&gt; data bits. Half-rate clocking enables data to be output from the ETM on both edges of TRACECLK. This effectively halves the clock frequency for the same data rate. Packing modes enable consecutive &lt;STRONG&gt;trace&lt;/STRONG&gt; samples to be written to the same memory location within RealView Trace. This increases the &lt;STRONG&gt;trace&lt;/STRONG&gt; depth. It has the disadvantage of coarser time-stamping. Time-stamping can be disabled completely to increase &lt;STRONG&gt;trace&lt;/STRONG&gt; depth even more. The system has the capability to set the port width automatically from the Configure ETM dialog box in RealView Debugger. Half-rate clocking and packing mode facilities provide correct operation at TRACECLK frequencies above 150MHz. Below 150MHz, the RealView &lt;STRONG&gt;Trace&lt;/STRONG&gt; system operates without these facilities. With these facilities enabled, TRACECLK speeds of up to 250MHz are supported." &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;A href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0155j/DUI0155J_rvi_user_guide.pdf"&gt;http://infocenter.arm.com/help/topic/com.arm.doc.dui0155j/DUI0155J_rvi_user_guide.pdf &lt;/A&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;regards&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Apr 2018 16:08:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Off-Chip-Trace-i-MX258/m-p/727873#M113214</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2018-04-13T16:08:00Z</dc:date>
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