<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: imx6q multiple display issue with same IPU in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-multiple-display-issue-with-same-IPU/m-p/724193#M112612</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi jignesh,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Most probable cause for this issue is huge load on the DDR memory bus.&amp;nbsp; One can adjust this by configuring IPU priorities in IOMUXC_GPR6 or NIC-301 (Chapter 46 Network Interconnect Bus System (NIC-301) i.MX6DL RM)&amp;nbsp;&lt;/P&gt;&lt;P&gt;or by optimizing custom application. However. these errors mean that IPU/LCD is not configured properly, please look at&lt;/P&gt;&lt;P&gt;below link for various LCD configurations&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="" data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fboundarydevices.com%2Fconfiguring-i-mx6-machines-different-screens-nitrogen6x-sabre-lite%2F" rel="nofollow" target="_blank"&gt;http://boundarydevices.com/configuring-i-mx6-machines-different-screens-nitrogen6x-sabre-lite/&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 13 Apr 2018 15:51:10 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2018-04-13T15:51:10Z</dc:date>
    <item>
      <title>imx6q multiple display issue with same IPU</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-multiple-display-issue-with-same-IPU/m-p/724192#M112611</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are using custom board of imx6q(part number MCIMX6Q6AVT10AD) with two display 1. LCD(800x480) primary 2. HDMI(1920x1080@60) secondary. Both LCD working correct and we are using kernel 3.14.28.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are facing issue that when HDMI output is working and if we restart LCD preview several times then we get following errors continuously on console. This result into that both LCD and HDMI stop working.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_10 = 0x00080000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00800000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_10 = 0x00080000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;mxc_sdc_fb fb.24: timeout when waiting for flip irq&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00800000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_10 = 0x00080000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00800000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_10 = 0x00080000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;mxc_sdc_fb fb.24: timeout when waiting for flip irq&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; color: #1f497d;"&gt;imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00800000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11pt; color: #000000;"&gt;Please&amp;nbsp; help us to resolve above issue.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11pt; color: #000000;"&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11pt; color: #000000;"&gt;Jignesh Patel&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Apr 2018 09:13:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-multiple-display-issue-with-same-IPU/m-p/724192#M112611</guid>
      <dc:creator>jignesh1</dc:creator>
      <dc:date>2018-04-12T09:13:56Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q multiple display issue with same IPU</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-multiple-display-issue-with-same-IPU/m-p/724193#M112612</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi jignesh,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Most probable cause for this issue is huge load on the DDR memory bus.&amp;nbsp; One can adjust this by configuring IPU priorities in IOMUXC_GPR6 or NIC-301 (Chapter 46 Network Interconnect Bus System (NIC-301) i.MX6DL RM)&amp;nbsp;&lt;/P&gt;&lt;P&gt;or by optimizing custom application. However. these errors mean that IPU/LCD is not configured properly, please look at&lt;/P&gt;&lt;P&gt;below link for various LCD configurations&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="" data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fboundarydevices.com%2Fconfiguring-i-mx6-machines-different-screens-nitrogen6x-sabre-lite%2F" rel="nofollow" target="_blank"&gt;http://boundarydevices.com/configuring-i-mx6-machines-different-screens-nitrogen6x-sabre-lite/&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Apr 2018 15:51:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-multiple-display-issue-with-same-IPU/m-p/724193#M112612</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2018-04-13T15:51:10Z</dc:date>
    </item>
  </channel>
</rss>

