uBoot MXS NAND Driver

mus — Wed, 21 Mar 2018 00:48:48 GMT

We are working with the mxs nand driver in uBoot on iMX6SX. uBoot loads the kernel from NAND fine and the kernel boots successfully. However, when we use mxs_nand_ecc_read_page() declared in mxs_nand.c to read a page, the buffer returned doesn't contain all the bytes from the kernel but also includes some ecc sections.

In a separate discussion in the community and research online, we found that there may be 2 ways of raw NAND layout for ECC. The two ways to store the redundant data are:

After every 512 bytes of data. This will cause some original data to be stored in the spare area. In RBL terminology, this is called "compatible mode".
Completely within the spare memory area. Here, the original data is stored in the page followed by all of the redundant data for that page together. This is called "non-compatible mode".

Since the mxs_nand_ecc_read_page() is returning ecc data after the 512 bytes in the buffer, we probably have the first layout described above.

As far as we can tell from reading the code in this function, the parameters configured suggests that BCH should strip out this extra data and just return the standalone data in the buffer returned. Although it strips the header, it still leaves the extra ecc data in the buffer causing the data to be truncated. But again, uBoot itself can read this area from NAND and put it in DRAM correctly. When we use the mxs_nand_ecc_read_page() from SPL, it fails as described above.

For reference, the NAND ecc layout picture is at iMX28 NAND Flash ECC Layout BBI Swap

As far as we can tell, there is a 10byte header, 512byte data + 13byte ecc repeated.

How do we resolve this?

Is there a way to configure the NAND ecc implementation for iMX6SX? Can the BCH be configured for "non-compatible mode" vs "compatible mode", either in DCD or in board init?
How do we fix mxs_nand_ecc_read_page() so it returns only the raw data?

Re: uBoot MXS NAND Driver

mus — Wed, 21 Mar 2018 19:41:35 GMT

I think the answer to #1 is no. iMX6 stores the data in compatible mode.

Re: uBoot MXS NAND Driver

mus — Mon, 26 Mar 2018 00:28:45 GMT

If anyone is wondering, after patching the bug in NXP's mxs_nand driver in uBoot, SPL is working correctly for i.MX6SoloX.

topic Re: uBoot MXS NAND Driver in i.MX Processors

uBoot MXS NAND Driver

Re: uBoot MXS NAND Driver

Re: uBoot MXS NAND Driver