Re: PCIe EP DMA write to i.MX6 RAM

egabay1 — Wed, 05 Apr 2017 10:29:16 GMT

Thanks Jaime,

To be more specific regarding my question, does the EP write access to the i.MX6 DDR memory managed by a DMA controller (for CPU core offload)?

According to Table 3-2. SDMA event mapping, in the i.MX6 i.MX 6Dual/6Quad Applications Processor Reference Manual, the PCIe is not mentioned as one of the i.MX6 DMA controller (SDMA) request signals.

Eyal

Re: PCIe EP DMA write to i.MX6 RAM

Yuri — Mon, 04 Sep 2017 09:04:19 GMT

Hello,

The configuration, shown in https://community.nxp.com/docs/DOC-95014

uses IPU DMA abilities.

Have a great day,
Yuri

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i.MX ProcessorsのトピックRe: PCIe EP DMA write to i.MX6 RAM

Re: PCIe EP DMA write to i.MX6 RAM

Re: PCIe EP DMA write to i.MX6 RAM