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    <title>topic MX6UL_SNVS_LP and POR pull-up in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/MX6UL-SNVS-LP-and-POR-pull-up/m-p/712767#M110819</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I saw on the&lt;A href="https://patchwork.ozlabs.org/patch/675922/"&gt; u-boot code&lt;/A&gt; that the POR_B pull-up can be configured using the register on &lt;SPAN class=""&gt;(MX6UL_SNVS_LP_BASE_ADDR + 0x10).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I couldn't find the documentation of this register on the IMX6URM (Rev. 1) and not on the IMX6ULSRM (Rev. C).&lt;/P&gt;&lt;P&gt;Where is this register documented?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 31 Aug 2017 09:27:43 GMT</pubDate>
    <dc:creator>sguy</dc:creator>
    <dc:date>2017-08-31T09:27:43Z</dc:date>
    <item>
      <title>MX6UL_SNVS_LP and POR pull-up</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MX6UL-SNVS-LP-and-POR-pull-up/m-p/712767#M110819</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I saw on the&lt;A href="https://patchwork.ozlabs.org/patch/675922/"&gt; u-boot code&lt;/A&gt; that the POR_B pull-up can be configured using the register on &lt;SPAN class=""&gt;(MX6UL_SNVS_LP_BASE_ADDR + 0x10).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I couldn't find the documentation of this register on the IMX6URM (Rev. 1) and not on the IMX6ULSRM (Rev. C).&lt;/P&gt;&lt;P&gt;Where is this register documented?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 31 Aug 2017 09:27:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MX6UL-SNVS-LP-and-POR-pull-up/m-p/712767#M110819</guid>
      <dc:creator>sguy</dc:creator>
      <dc:date>2017-08-31T09:27:43Z</dc:date>
    </item>
    <item>
      <title>Re: MX6UL_SNVS_LP and POR pull-up</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MX6UL-SNVS-LP-and-POR-pull-up/m-p/712768#M110820</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;which register do you need? &lt;SPAN class=""&gt;SNVS_LP&lt;/SPAN&gt; is low power doman, if you couldn't find the register from Reference Manual, one can refer to the source code, in fact some internal registers, customer don't need to change it.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Sep 2017 08:39:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MX6UL-SNVS-LP-and-POR-pull-up/m-p/712768#M110820</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2017-09-01T08:39:29Z</dc:date>
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