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    <title>i.MX ProcessorsのトピックRe: How to set TAMPER pins as GPIO whose properties are equal to device tree.</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712012#M110693</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Hirotoshi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please look at imx6ull-14x14-evk.dts example, using&amp;nbsp;&amp;amp;iomuxc_snvs..&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6ull-14x14-evk.dts?h=imx_4.9.11_1.0.0_ga" title="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6ull-14x14-evk.dts?h=imx_4.9.11_1.0.0_ga"&gt;linux-imx.git - i.MX Linux Kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;in latest Linux 4.9.11_1.0.0 BSP, description on link&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/webapp/Download?colCode=L4.9.11_1.0.0_LINUX_DOCS" title="https://www.nxp.com/webapp/Download?colCode=L4.9.11_1.0.0_LINUX_DOCS"&gt;https://www.nxp.com/webapp/Download?colCode=L4.9.11_1.0.0_LINUX_DOCS&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 20 Oct 2017 07:43:34 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2017-10-20T07:43:34Z</dc:date>
    <item>
      <title>How to set TAMPER pins as GPIO whose properties are equal to device tree.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712011#M110692</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I am confused how can I set TAMPER pins as GPIO whose properties are equal to device tree.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I use imx6ull board.&lt;/P&gt;&lt;P&gt;I&amp;nbsp;directly accessed&amp;nbsp;register address with memtool and got following information.&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;SW_MUX_CTL_PAD_SNVS_TAMPER1: reg val 0x0&lt;/P&gt;&lt;P&gt;SW_PAD_CTL_PAD_SNVS_TAMPER1: reg val 0x0&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;other tamper pins are the same as above.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However I defined these pins for GPIO in device tree as follows.&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&amp;amp;iomuxc {&lt;BR /&gt; pinctrl-names = "default";&lt;BR /&gt; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_hog_1&amp;gt;;&lt;BR /&gt; imx6ul-evk {&lt;BR /&gt; pinctrl_hog_1: hoggrp-1 {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;/P&gt;&lt;P&gt;MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000110B0&lt;BR /&gt; MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0000B0A0&lt;BR /&gt; MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x000110B0&lt;BR /&gt; MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x000110B0&lt;BR /&gt; MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x000110B0&lt;BR /&gt; MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x000110B0&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;The values of device tree do not set in the register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The IMX6ULRM says that TAMPER_PIN_DISABLE in fuse has to be 11 to disable TAMPER0-9 and use as GPIO.&lt;/P&gt;&lt;P&gt;So I&amp;nbsp;checked 0x430[21:20] and got 11. I think this means tamper pins are set as&amp;nbsp;ALT5 GPIO mode.&lt;/P&gt;&lt;P&gt;I checked fuse in uboot too (refer to &lt;A href="https://community.nxp.com/thread/382019"&gt;mx6ul tamper pin to gpio &lt;/A&gt;&amp;nbsp;). The result is following.&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;Hit any key to stop autoboot: 0&lt;BR /&gt;=&amp;gt; fuse read 0 3&lt;BR /&gt;Reading bank 0:&lt;/P&gt;&lt;P&gt;Word 0x00000003: 71300070&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;note that 0x71300070 =&amp;nbsp;1110001001100000000000001110000&lt;/P&gt;&lt;P&gt;From the beggining, TAMPER_PIN_DISABLE is 11. Can I set them in device tree? I could not find any definition of tamper pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I could export these tamper pins in sysfs, but the values cannot be written even if I set them as output direction.&lt;/P&gt;&lt;P&gt;The values are always HIGH.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Why can't I set register values as defined in device tree ?&lt;/P&gt;&lt;P&gt;Why can't I change H/L even if I set tamper pins as output direction?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Oct 2017 04:24:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712011#M110692</guid>
      <dc:creator>Hirotoshi_Sato</dc:creator>
      <dc:date>2017-10-20T04:24:32Z</dc:date>
    </item>
    <item>
      <title>Re: How to set TAMPER pins as GPIO whose properties are equal to device tree.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712012#M110693</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Hirotoshi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please look at imx6ull-14x14-evk.dts example, using&amp;nbsp;&amp;amp;iomuxc_snvs..&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6ull-14x14-evk.dts?h=imx_4.9.11_1.0.0_ga" title="http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6ull-14x14-evk.dts?h=imx_4.9.11_1.0.0_ga"&gt;linux-imx.git - i.MX Linux Kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;in latest Linux 4.9.11_1.0.0 BSP, description on link&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/webapp/Download?colCode=L4.9.11_1.0.0_LINUX_DOCS" title="https://www.nxp.com/webapp/Download?colCode=L4.9.11_1.0.0_LINUX_DOCS"&gt;https://www.nxp.com/webapp/Download?colCode=L4.9.11_1.0.0_LINUX_DOCS&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Oct 2017 07:43:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712012#M110693</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-10-20T07:43:34Z</dc:date>
    </item>
    <item>
      <title>Re: How to set TAMPER pins as GPIO whose properties are equal to device tree.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712013#M110694</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;I found that I defined &lt;SPAN style="color: #51626f; background-color: #f6f6f6;"&gt;MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000110B0 though I use imx6ULL.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #f6f6f6;"&gt;So I defined in&amp;nbsp;imx6ull-var-dart.dtsi as follows and removed the description of&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;MX6UL_PAD_SNVS_TAMPER...&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;SPAN style="color: #51626f; background-color: #f6f6f6;"&gt;&amp;amp;iomuxc_snvs {&lt;BR /&gt; pinctrl-names = "default_snvs";&lt;BR /&gt; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_hog_2&amp;gt;;&lt;BR /&gt; imx6ul-evk {&lt;BR /&gt; pinctrl_hog_2: hoggrp-2 {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000110B0&lt;BR /&gt; MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0000B0A0&lt;BR /&gt; MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x000110B0&lt;BR /&gt; MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x000110B0&lt;BR /&gt; MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x000110B0&lt;BR /&gt; MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x000110B0&lt;BR /&gt;&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; };&lt;BR /&gt;};&lt;/SPAN&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;It seems to work as GPIO because H/L can be changed by sysfs.&lt;/P&gt;&lt;P&gt;Next, I would like to check the register value.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;iomuxc_snvs is defined as follows:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;iomuxc_snvs: iomuxc-snvs@02290000 {&lt;BR /&gt; compatible = "fsl,imx6ull-iomuxc-snvs";&lt;BR /&gt; reg = &amp;lt;0x02290000 0x10000&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;So the base address is 0x2290000.&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;/*&lt;BR /&gt; * The pin function ID is a tuple of&lt;BR /&gt; * &amp;lt;mux_reg conf_reg input_reg mux_mode input_val&amp;gt;&lt;BR /&gt; */&lt;BR /&gt;#define MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x0000 0x0044 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x0004 0x0048 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0008 0x004C 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000C 0x0050 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0010 0x0054 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0014 0x0058 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0018 0x005C 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x001C 0x0060 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0020 0x0064 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0024 0x0068 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0028 0x006C 0x0000 0x5 0x0&lt;BR /&gt;#define MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x002C 0x0070 0x0000 0x5 0x0&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;From above,&amp;nbsp;&lt;SPAN style="background-color: #f6f6f6;"&gt;MX6ULL_PAD_SNVS_TAMPER1 address is 0x2290000 + 0x000C = 0x229000C.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #f6f6f6;"&gt;So I checked with /unit_tests/memtool. However I could not access the register.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #f6f6f6;"&gt;The result is&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;root@imx6ul-var-dart:/unit_tests# ./memtool 229000c 1&lt;BR /&gt;E&lt;BR /&gt;Reading 0x1 count starting at addUnhandled fault: external abort on non-linefetch (0x1008) at 0x76faf00c&lt;BR /&gt;pgd = 885d0000&lt;BR /&gt;[76faf00c] *pgd=885f4831, *pte=02290703, *ppte=02290e33&lt;BR /&gt;ress 0x0229000C&lt;/P&gt;&lt;P&gt;Bus error&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;What is the problem? The addrss I accessed is wrong?&lt;/P&gt;&lt;P&gt;What is the register address of imx6ull not imx6ul?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Oct 2017 12:52:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712013#M110694</guid>
      <dc:creator>Hirotoshi_Sato</dc:creator>
      <dc:date>2017-10-20T12:52:25Z</dc:date>
    </item>
    <item>
      <title>Re: How to set TAMPER pins as GPIO whose properties are equal to device tree.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712014#M110695</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Hirotoshi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for addresses please check Chapter 33 IOMUX Controller (IOMUXC)&lt;BR /&gt;i.MX6ULL Reference Manual &lt;BR /&gt;&lt;A href="http://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf"&gt;http://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Oct 2017 23:09:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712014#M110695</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-10-20T23:09:20Z</dc:date>
    </item>
    <item>
      <title>Re: How to set TAMPER pins as GPIO whose properties are equal to device tree.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712015#M110696</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello igor&lt;/P&gt;&lt;P&gt;I have the same problem and i don't understand the answer.&lt;/P&gt;&lt;P&gt;Why memtool can't access to 229000c address?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 17 Nov 2017 12:18:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-set-TAMPER-pins-as-GPIO-whose-properties-are-equal-to/m-p/712015#M110696</guid>
      <dc:creator>joseluiszabalza</dc:creator>
      <dc:date>2017-11-17T12:18:34Z</dc:date>
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