topic Re: i.MX7D DDR Calibration in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706868#M109847 <HTML><HEAD></HEAD><BODY><P>But i don´t know how to get the correct calibration values (i didn´t find them in the previously attached result of ddr calibration tool).</P></BODY></HTML> Fri, 25 Aug 2017 10:58:26 GMT dietersteininge 2017-08-25T10:58:26Z i.MX7D DDR Calibration https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706866#M109845 <HTML><HEAD></HEAD><BODY><P>I`m using i.MX7D with DDR3 ram on a custom board. Is DDR Calibration necessary for i.MX7D?</P><P>When running DDR Calibration (ddr_stress_tester_v2.70), i got following result:</P><P></P><BLOCKQUOTE class="jive-quote"><P>============================================<BR />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DDR Stress Test (2.6.0) <BR />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Build: Aug&nbsp; 1 2017, 17:34:14<BR />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NXP Semiconductors.<BR />============================================</P><P>============================================<BR />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Chip ID<BR />CHIP ID = i.MX7 Dual (0x72)<BR />Internal Revision = TO1.2<BR />============================================</P><P>============================================<BR />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Boot Configuration<BR />SRC_SBMR1(0x30390058) = 0x00004000<BR />SRC_SBMR2(0x30390070) = 0x29000011<BR />============================================</P><P>============================================<BR />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DDR configuration<BR />DDR type is DDR3 <BR />Data width: 32, bank num: 8<BR />Row size: 15, col size: 10<BR />One chip select is used <BR />Density per chip select: 1024MB <BR />Total density is 1024MB <BR />============================================</P><P>DDR Freq: 528 MHz</P><P>Calibration for 32-bit data bus</P><P></P><P>Starting Read calibration...</P><P></P><P>Read Delay value:&nbsp; Result:<BR />0x9e9e9e9e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x9c9c9c9c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x9a9a9a9a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x98989898&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x96969696&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x94949494&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x92929292&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x90909090&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x8e8e8e8e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x8c8c8c8c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x8a8a8a8a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x88888888&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0110<BR />0x86868686&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x84848484&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x82828282&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x80808080&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x02020202&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x04040404&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x06060606&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x08080808&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x0a0a0a0a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x0c0c0c0c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x0e0e0e0e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x10101010&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x12121212&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x14141414&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x16161616&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x18181818&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x1a1a1a1a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x1c1c1c1c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x1e1e1e1e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x20202020&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0100<BR />0x22222222&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x24242424&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x26262626&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x28282828&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x2a2a2a2a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x2c2c2c2c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x2e2e2e2e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111</P><P></P><P>Final read delay = 0x0C0C0C0C<BR />-Note: final delay is based on the center of all passing byte lanes</P><P></P><P>Starting Write calibration...</P><P></P><P>Write Delay value:&nbsp; Result:<BR />0x9e9e9e9e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x9c9c9c9c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x9a9a9a9a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x98989898&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x96969696&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x94949494&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x92929292&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x90909090&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x8e8e8e8e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x8c8c8c8c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x8a8a8a8a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x88888888&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x86868686&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x84848484&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x82828282&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x80808080&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x02020202&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x04040404&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x06060606&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x08080808&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x0a0a0a0a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x0c0c0c0c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x0e0e0e0e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x10101010&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x12121212&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x14141414&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x16161616&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x18181818&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x0000<BR />0x1a1a1a1a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1110<BR />0x1c1c1c1c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x1e1e1e1e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x20202020&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x22222222&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x24242424&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x26262626&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x28282828&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x2a2a2a2a&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x2c2c2c2c&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111<BR />0x2e2e2e2e&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 0x1111</P><P></P><P>Final write delay = 0x06060606<BR />-Note: final delay is based on the center of all passing byte lanes</P><P></P><P>Success: DDR calibration completed!!!</P></BLOCKQUOTE><P>I dont´t know, how this result will help confguring DDR in uboot?</P></BODY></HTML> Fri, 25 Aug 2017 07:50:57 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706866#M109845 dietersteininge 2017-08-25T07:50:57Z Re: i.MX7D DDR Calibration https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706867#M109846 <HTML><HEAD></HEAD><BODY><P>Hello Dieter,</P><P>it is recommended to perform the calibration for the custom boards as the layout is usually different from our refference design.</P><P></P><P>The calibration&nbsp;values are used to update the&nbsp;DCD table that is used for configuration of all necessary components needed for boot.</P><P></P><P>Best Regards,</P><P>Jan</P></BODY></HTML> Fri, 25 Aug 2017 10:50:41 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706867#M109846 jan_spurek 2017-08-25T10:50:41Z Re: i.MX7D DDR Calibration https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706868#M109847 <HTML><HEAD></HEAD><BODY><P>But i don´t know how to get the correct calibration values (i didn´t find them in the previously attached result of ddr calibration tool).</P></BODY></HTML> Fri, 25 Aug 2017 10:58:26 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706868#M109847 dietersteininge 2017-08-25T10:58:26Z Re: i.MX7D DDR Calibration https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706869#M109848 <HTML><HEAD></HEAD><BODY><P>The calibration values are listed as final delay:</P><P></P><P>Final read delay = 0x0C0C0C0C</P><P>Final write delay = 0x06060606</P><P></P><P>Best Regards,</P><P>Jan</P></BODY></HTML> Fri, 25 Aug 2017 11:02:20 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX7D-DDR-Calibration/m-p/706869#M109848 jan_spurek 2017-08-25T11:02:20Z