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    <title>i.MX ProcessorsのトピックRe: IMX6ULL Boot configuration issue for Sd and eMMc</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX6ULL-Boot-configuration-issue-for-Sd-and-eMMc/m-p/704978#M109508</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ramesh&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ROM basically is the same for both IMX6UL and IMX6ULL processors.&lt;/P&gt;&lt;P&gt;One can try to find reason of such behaviour reading with jtag SRC_SBMR1,2 registers.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Can be possible to change only Software code level(uboot) to make this board work SD/eMMC&lt;/P&gt;&lt;P&gt;&amp;gt;without hardware modification?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;no, as boot configuration is sampled by ROM from boot pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 18 Sep 2017 23:10:14 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2017-09-18T23:10:14Z</dc:date>
    <item>
      <title>IMX6ULL Boot configuration issue for Sd and eMMc</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6ULL-Boot-configuration-issue-for-Sd-and-eMMc/m-p/704977#M109507</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Our Customised design using IMX6ULL we are facing the issue in SD boot and eMMc boot because we are not using switch for &amp;nbsp;BT_CFG2[3] to change Sd or eMMc boot.&lt;/P&gt;&lt;P&gt;We followed the NXP EVK boot configuration resistor setting same in our design.&lt;/P&gt;&lt;P&gt;Following are the Queries:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Any difference in software ROM level between IMX6UL vs IMX6ULL processor?&lt;/LI&gt;&lt;LI&gt;How IMX6UL design working fine without change in BT_CFG2[3] logic level but IMX6ULL doesn't work?&lt;/LI&gt;&lt;LI&gt;Can be possible to change only Software code level(uboot) to make this board work SD/eMMC without hardware modification?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Please find the attached image which have marked the BT_CFG2[3]&lt;/P&gt;&lt;P&gt;Thanks in advance,&lt;/P&gt;&lt;P&gt;Rameshkumar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Sep 2017 10:01:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6ULL-Boot-configuration-issue-for-Sd-and-eMMc/m-p/704977#M109507</guid>
      <dc:creator>ramesh6663</dc:creator>
      <dc:date>2017-09-18T10:01:45Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6ULL Boot configuration issue for Sd and eMMc</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6ULL-Boot-configuration-issue-for-Sd-and-eMMc/m-p/704978#M109508</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ramesh&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ROM basically is the same for both IMX6UL and IMX6ULL processors.&lt;/P&gt;&lt;P&gt;One can try to find reason of such behaviour reading with jtag SRC_SBMR1,2 registers.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;Can be possible to change only Software code level(uboot) to make this board work SD/eMMC&lt;/P&gt;&lt;P&gt;&amp;gt;without hardware modification?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;no, as boot configuration is sampled by ROM from boot pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Sep 2017 23:10:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6ULL-Boot-configuration-issue-for-Sd-and-eMMc/m-p/704978#M109508</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-09-18T23:10:14Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6ULL Boot configuration issue for Sd and eMMc</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6ULL-Boot-configuration-issue-for-Sd-and-eMMc/m-p/704979#M109509</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Sep 2017 11:24:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6ULL-Boot-configuration-issue-for-Sd-and-eMMc/m-p/704979#M109509</guid>
      <dc:creator>ramesh6663</dc:creator>
      <dc:date>2017-09-20T11:24:33Z</dc:date>
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