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    <title>topic Re:  misstake with my DDR3 calibration in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702323#M109111</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi zhangzhiyong&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please set MR1=4, description of usage of ddr tool can be found in presentation on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-331528"&gt;DES-N1936 i.MX 6UltraLite DDR Tools Overview and Hardware Design Considerations.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;for calibration explanation please check last comment on thread&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/456246"&gt;Write Leveling register WL_SW_RESx&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;various ddr test errors are described on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-101708"&gt;Freescale i.MX6 DRAM Port Application Guide-DDR3&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 20 Aug 2017 23:21:36 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2017-08-20T23:21:36Z</dc:date>
    <item>
      <title>misstake with my DDR3 calibration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702322#M109110</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;Today,I test my on board DDR3 with DDR_Stress_tools_V1.0.3 and&amp;nbsp;DDR_Stress_tools_V2.7.0.My board used MT41K128M16JT-125K,The SCH please see the SCH.PDF.now I used the DDR tools, created inc file .named MYBOARD.inc&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;&amp;nbsp;&lt;span class="lia-inline-image-display-wrapper" image-alt="192135_192135.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/123117i81E1D451F74F494D/image-size/large?v=v2&amp;amp;px=999" role="button" title="192135_192135.png" alt="192135_192135.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/26803iE7352DA9B596E54C/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;Then I used it in&amp;nbsp;DDR_Stress_tools_V2.7.0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="192136_192136.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/123118i32F94AF660A1C078/image-size/large?v=v2&amp;amp;px=999" role="button" title="192136_192136.png" alt="192136_192136.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/26835iE765DA99755021DC/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;calibration result is on picture &amp;nbsp;then I put the value in MYBOARD.inc,&amp;nbsp;calibration it again&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;several timesand used the&amp;nbsp;initial MYBOARD.incseveral times.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'times new roman', times, serif;"&gt;&lt;SPAN style="font-size: 22px; color: #ff0000;"&gt;The rusults is all different.&lt;/SPAN&gt;&lt;SPAN style="font-size: 22px;"&gt;&lt;STRONG&gt; &amp;nbsp;&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;in every&amp;nbsp;times,After test,I put the all &amp;nbsp;the &amp;nbsp;value&amp;nbsp;I got in Flash_header.S .it no work even got worse ,some result can`t standup kernel.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;then &amp;nbsp;I used&amp;nbsp;DDR_Stress_tools_V1.0.3 ，The&amp;nbsp;phenomenon is same.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;MY Stress test used&amp;nbsp;MX6Q_SabreSD_DDR3_register_programming_aid_v1.5.inc can do well&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;It debug print says "Stress test successful"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;Is my&amp;nbsp;calibration wrong ？？？If I wrong please tell me how to&amp;nbsp;calibration it&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;My English is poor&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 22px; font-family: 'times new roman', times, serif;"&gt;thank you&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-337003"&gt;ddr_calibration_20170820-16'50'34.log.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-337003"&gt;ddr_calibration_20170820-16'46'42.log.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 20 Aug 2017 16:45:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702322#M109110</guid>
      <dc:creator>zhangzhiyong1</dc:creator>
      <dc:date>2017-08-20T16:45:39Z</dc:date>
    </item>
    <item>
      <title>Re:  misstake with my DDR3 calibration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702323#M109111</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi zhangzhiyong&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please set MR1=4, description of usage of ddr tool can be found in presentation on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-331528"&gt;DES-N1936 i.MX 6UltraLite DDR Tools Overview and Hardware Design Considerations.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;for calibration explanation please check last comment on thread&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/456246"&gt;Write Leveling register WL_SW_RESx&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;various ddr test errors are described on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-101708"&gt;Freescale i.MX6 DRAM Port Application Guide-DDR3&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 20 Aug 2017 23:21:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702323#M109111</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-08-20T23:21:36Z</dc:date>
    </item>
    <item>
      <title>Re:  misstake with my DDR3 calibration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702324#M109112</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ,&lt;A _jive_internal="true" class="" data-avatarid="1034" data-externalid="" data-online="false" data-presence="null" data-userid="206296" data-username="igorpadykov" href="https://community.nxp.com/people/igorpadykov" style="color: inherit; background-color: #ffffff; border: 0px; font-weight: bold; font-size: 14px;"&gt;igorpadykov&lt;/A&gt;,How i can get it?&lt;/P&gt;&lt;P&gt;thank you&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/26801i1FBE17B5FAE9B961/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 20 Aug 2017 23:53:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702324#M109112</guid>
      <dc:creator>zhangzhiyong1</dc:creator>
      <dc:date>2017-08-20T23:53:45Z</dc:date>
    </item>
    <item>
      <title>Re:  misstake with my DDR3 calibration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702325#M109113</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI,It`s&amp;nbsp;&lt;/P&gt;&lt;P&gt;MMDC registers updated from calibration &lt;BR /&gt; &lt;BR /&gt; Write leveling calibration &lt;BR /&gt; MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x0029002B &lt;BR /&gt; MMDC_MPWLDECTRL1 ch0 (0x021b0810) = 0x0034002D &lt;BR /&gt; MMDC_MPWLDECTRL0 ch1 (0x021b480c) = 0x000B0027 &lt;BR /&gt; MMDC_MPWLDECTRL1 ch1 (0x021b4810) = 0x0014001B &lt;BR /&gt; &lt;BR /&gt; Read DQS Gating calibration &lt;BR /&gt; MPDGCTRL0 PHY0 (0x021b083c) = 0x03480358 &lt;BR /&gt; MPDGCTRL1 PHY0 (0x021b0840) = 0x033C0340 &lt;BR /&gt; MPDGCTRL0 PHY1 (0x021b483c) = 0x03480348 &lt;BR /&gt; MPDGCTRL1 PHY1 (0x021b4840) = 0x03300310 &lt;BR /&gt; &lt;BR /&gt; Read calibration &lt;BR /&gt; MPRDDLCTL PHY0 (0x021b0848) = 0x3A343238 &lt;BR /&gt; MPRDDLCTL PHY1 (0x021b4848) = 0x38342E3C &lt;BR /&gt; &lt;BR /&gt; Write calibration &lt;BR /&gt; MPWRDLCTL PHY0 (0x021b0850) = 0x4A443C38 &lt;BR /&gt; MPWRDLCTL PHY1 (0x021b4850) = 0x4E44483E &lt;BR /&gt; the result is all upload to the Flash_header.S&lt;/P&gt;&lt;P&gt;If I upload&amp;nbsp;More or less&amp;nbsp;&lt;/P&gt;&lt;P&gt;thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 21 Aug 2017 16:44:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/misstake-with-my-DDR3-calibration/m-p/702325#M109113</guid>
      <dc:creator>zhangzhiyong1</dc:creator>
      <dc:date>2017-08-21T16:44:33Z</dc:date>
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