topic Question on hog in device tree in i.MX Processors

Question on hog in device tree

christophe — Mon, 09 Oct 2017 09:37:20 GMT

Hi all,

I have a trouble with pin "hogging" in a particular case, and no explanation about it.

I have a camera chip connected to an imx6q through spi. The chip needs 4 gpios to work (GPIO2_28, GPIO3_19, GPIO3_20 and GPIO5_0). All these gpio are named in ecspi2 structure, and pin are declared in pinctrl_gschip.

For me, it would be enough to make the chip work... But it's not the case, since the GPIO2_28, set up in the chip driver, has no level change at all.

To make it work, i have to also declare the pin in iomuxc structure. In this case, the GPIO2_28 is fully operationnal.

Do you see some explanation about this issue ?

&ecspi2 {
   fsl,spi-num-chipselects = <1>;
   cs-gpios = <&gpio2 26 0>;
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_ecspi2>;
   status = "okay";

gschip: gschip@0 {
    compatible = "gn,gschip";
    reg = <0>;
    pinctrl-0 = <&pinctrl_gschip>;
    mclk = <74500000>;
    mclk_src = <0>;
    ipu= <0>;
    csi = <0>;
    spi-max-frequency = <20000000>;
    reset-gpio = <&gpio2 28 0>;
    sdi_lock-gpio = <&gpio3 19 0>;
    rate_det-gpio = <&gpio3 20 0>;
    data_err-gpio = <&gpio5 0 0>;
   };
};

    pinctrl_gschip: gschipgrp {
      fsl,pins = <
        MX6QDL_PAD_EIM_EB0__GPIO2_IO28            0x1b0b1
        MX6QDL_PAD_EIM_D19__GPIO3_IO19            0x1b0b1
        MX6QDL_PAD_EIM_D20__GPIO3_IO20            0x1b0b1
        MX6QDL_PAD_EIM_WAIT__GPIO5_IO00           0x1b0b1
      >;
    };

&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;

   imx6qdl-starlitehd {
       pinctrl_hog: hoggrp {
           fsl,pins = <
        MX6QDL_PAD_EIM_EB0__GPIO2_IO28            0x1b0b1   /* Reset Gennum */
           >;
       };

Best regards,

Christophe

Re: Question on hog in device tree

gusarambula — Tue, 10 Oct 2017 20:03:26 GMT

Hello Christophe Cholet,

I was doing some research as this behavior seemed odd. However, it is possible that the gschip@0 node is lacking the pintrl-names definition. Would you please try adding it before the pinctrl-0 definition? Let us know if it helps

Would look like:

pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gschip>;

I hope this helps!

Regards,

Re: Question on hog in device tree

fabio_estevam — Tue, 10 Oct 2017 20:25:43 GMT

Hi Christophe,

The hog pins should be used for those pins that are not controlled by any particular driver.

In your usecase the 'gn,gschip' driver should request and control the GPIOs accordingly.

Regards,

Fabio Estevam

Re: Question on hog in device tree

christophe — Wed, 11 Oct 2017 06:40:36 GMT

Hi gusarambula,

Adding pinctrl-0 has no effect. Pin still must be in hog.

Rgds,

Christophe

Re: Question on hog in device tree

christophe — Wed, 11 Oct 2017 06:45:55 GMT

Hi Fabio,

I agree with you. This pin is used by 'gn,gschip' driver. But it is actually not drived if not declared in hog.

I assume it's a bug in device tree.

Rgds,

Christophe