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    <title>i.MX Processorsのトピック i.MX6 SPI-NOR boot.</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-NOR-boot/m-p/697600#M108306</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;&amp;nbsp; I am facing issue in SPI boot on i.MX6Q based Solo board.&amp;nbsp; When I boot image&amp;nbsp; from SD card and flash the u-boot binary to SPI flash ,&amp;nbsp; write is successful and able to read and erase the SPI NOR memory. But Uboot is not coming up once I change the boot media to SPI.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Below are the lines which I have used for SPI&lt;/P&gt;&lt;P&gt;EIM_D17 - MISO.alt1&lt;/P&gt;&lt;P&gt;EIM_D18 - MOSI.alt1&lt;/P&gt;&lt;P&gt;CSI0_DAT4 - CLOCK.alt2&lt;/P&gt;&lt;P&gt;EIM_EB2 - Chip Select&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When we probed, the CS signal is appearing but no clock signals are coming. But the clock signals are being generated during read and write operations except during boot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can we use CSI0_DAT4 for clock instead of&amp;nbsp; EIM_D16.alt1? Is&amp;nbsp; EIM_D16.alt1 is mandatory for SPI NOR Boot?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 11 Aug 2017 12:38:06 GMT</pubDate>
    <dc:creator>anjalikkrishna</dc:creator>
    <dc:date>2017-08-11T12:38:06Z</dc:date>
    <item>
      <title>i.MX6 SPI-NOR boot.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-NOR-boot/m-p/697600#M108306</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;&amp;nbsp; I am facing issue in SPI boot on i.MX6Q based Solo board.&amp;nbsp; When I boot image&amp;nbsp; from SD card and flash the u-boot binary to SPI flash ,&amp;nbsp; write is successful and able to read and erase the SPI NOR memory. But Uboot is not coming up once I change the boot media to SPI.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Below are the lines which I have used for SPI&lt;/P&gt;&lt;P&gt;EIM_D17 - MISO.alt1&lt;/P&gt;&lt;P&gt;EIM_D18 - MOSI.alt1&lt;/P&gt;&lt;P&gt;CSI0_DAT4 - CLOCK.alt2&lt;/P&gt;&lt;P&gt;EIM_EB2 - Chip Select&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When we probed, the CS signal is appearing but no clock signals are coming. But the clock signals are being generated during read and write operations except during boot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can we use CSI0_DAT4 for clock instead of&amp;nbsp; EIM_D16.alt1? Is&amp;nbsp; EIM_D16.alt1 is mandatory for SPI NOR Boot?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 11 Aug 2017 12:38:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-NOR-boot/m-p/697600#M108306</guid>
      <dc:creator>anjalikkrishna</dc:creator>
      <dc:date>2017-08-11T12:38:06Z</dc:date>
    </item>
    <item>
      <title>Re:  i.MX6 SPI-NOR boot.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-NOR-boot/m-p/697601#M108307</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Only predefined pin muxing configurations - shown in &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial; display: inline !important; float: none;"&gt;Table 8-24 (SPI IOMUX &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 13px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial; display: inline !important; float: none;"&gt;Pin Configuration) of the iMX6 DQ RM,&amp;nbsp;Rev. 3, 07/2015 -&lt;/SPAN&gt; are supported by boot ROM&lt;/P&gt;&lt;P&gt;for SPI boot. This means it is possible to use any possible pin muxing configuration,&lt;/P&gt;&lt;P&gt;after boot, but NOT for boot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 Aug 2017 04:34:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-NOR-boot/m-p/697601#M108307</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2017-08-14T04:34:51Z</dc:date>
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