i.MX ProcessorsのトピックMX7D A7/M4 peripheral access https://community.nxp.com/t5/i-MX-Processors/MX7D-A7-M4-peripheral-access/m-p/692539#M107364 <HTML><HEAD></HEAD><BODY><P>Hello!</P><P></P><P>the MX7D provides 7 UARTs. The datasheet splits these UARTs&nbsp;into "AP Periphals" and "Shared Peripherals".</P><P><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/24764iC592001BDB1F6F12/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /></span></P><P>It seems like I may access all UARTs from any core&nbsp;(A7/M4). When I need DMA functionality, i have to use one of the UARTs in the "shared block". Is this correct?</P><P>How do I find out which UART interface is part of which block?</P></BODY></HTML> Tue, 11 Jul 2017 13:39:37 GMT demoniacmilk 2017-07-11T13:39:37Z MX7D A7/M4 peripheral access https://community.nxp.com/t5/i-MX-Processors/MX7D-A7-M4-peripheral-access/m-p/692539#M107364 <HTML><HEAD></HEAD><BODY><P>Hello!</P><P></P><P>the MX7D provides 7 UARTs. The datasheet splits these UARTs&nbsp;into "AP Periphals" and "Shared Peripherals".</P><P><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/24764iC592001BDB1F6F12/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /></span></P><P>It seems like I may access all UARTs from any core&nbsp;(A7/M4). When I need DMA functionality, i have to use one of the UARTs in the "shared block". Is this correct?</P><P>How do I find out which UART interface is part of which block?</P></BODY></HTML> Tue, 11 Jul 2017 13:39:37 GMT https://community.nxp.com/t5/i-MX-Processors/MX7D-A7-M4-peripheral-access/m-p/692539#M107364 demoniacmilk 2017-07-11T13:39:37Z Re: MX7D A7/M4 peripheral access https://community.nxp.com/t5/i-MX-Processors/MX7D-A7-M4-peripheral-access/m-p/692540#M107365 <HTML><HEAD></HEAD><BODY><P>Hi Lars,</P><P></P><P>in the Reference manual you can find the following table. It shows that UART1, UART2 and UART3 are able tu use DMA.</P><P></P><P></P><P><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/25654i772E00809E579211/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /></span></P><P><BR />Best regards,<BR />Carlos</P><P></P><P>-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Tue, 11 Jul 2017 18:22:32 GMT https://community.nxp.com/t5/i-MX-Processors/MX7D-A7-M4-peripheral-access/m-p/692540#M107365 Carlos_Musich 2017-07-11T18:22:32Z