Change the AXI priority setting

ko-hey — Wed, 02 Aug 2017 08:40:12 GMT

Hi all

My customer and I are testing the LCDIF output with i.MX7D.

When the frequency is lowered, a phenomenon in which the image output by MIPI DSI is distorted has occurred.
Since we are changing only the frequency of DDR, we believe that the amount of data exchanged exceeds the amount of data that can be tolerated by DDR.

The DDR and the LCDIF are connected by AXI.

Do you have settings that make AXI transaction for LCDIF preferentially executed ?

My understanding is the highest priority in AXI transaction is image processing including LCDIF output.

Am I correct ?

Ko-hey

Re: Change the AXI priority setting

art — Fri, 04 Aug 2017 10:44:51 GMT

A1. There is the NIC-301 Network Inter-Connect AXI arbiter IP by ARM that controls the access priority on the AXI/AHB bus. It is briefly decribeed in the Section 4.6 of the i.MX7Dual Reference Manual document. The NIC-301 default settings are configured by the board support package (BSP) software, and in most cases should not be modified by the customer. The default settings have gone through exhaustive testing during the validation of the part, and have proven to work well for the part's intended target applications. Changes to the default settings may result in a degradation in system performance.

A2. No, the highest priority is the A7 core access.

Have a great day,
Artur

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

i.MX ProcessorsのトピックRe: Change the AXI priority setting

Change the AXI priority setting

Re: Change the AXI priority setting