<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Interfacing OV7251 single lane MIPI sensor with iMX6 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/688997#M106673</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am trying to interface the single lane MIPI sensor OV7251 sensor with imx6.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;MIPI_CSI_PHY_STATE register value is continuously changing between 0x0000_0300 and 0x0000_0310. MIPI_CSI_ERR1 and MIPI_CSI_ERR2 status registers are also zero. But Frames are not coming to memory. please let me know if any body faced this issue?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If i probed the MIPI clock and MIPI data lines from sensor , it is toggling&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Settings at imx6 side:&lt;/P&gt;&lt;P&gt;&amp;nbsp;MIPI D-PHY clock &amp;nbsp;= &amp;nbsp;0x2a ( 330 to 360 Mhz)&lt;/P&gt;&lt;P&gt;IPU0, CSI1, &amp;nbsp;Virtual channel 0&lt;/P&gt;&lt;P&gt;Data type =0x2A&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;settings at sensor side&lt;/P&gt;&lt;P&gt;sensor's MIPI Clock lane frequency = 112MhZ&lt;/P&gt;&lt;P&gt;MIPI Data type = &amp;nbsp;0x 2A&lt;/P&gt;&lt;P&gt;Resolution : 640 x 480&lt;/P&gt;&lt;P&gt;Frames : 30fps&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Q1. Is the above status registers denotes iMX6 receiving MIPI packets or not? . Since check sum error also zero.&lt;/P&gt;&lt;P&gt;Q2 .How should I know weather iMX6 received MIPI packets or not?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Q3. we have configured single lane in imx6 dts file. Is there other things need to configure at imx6 side for single lane? Q4. anybody interfaced 0V7251 single lane MIPI with imx6?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Ta##@milarasan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 08 Jul 2017 14:21:43 GMT</pubDate>
    <dc:creator>tamilarasane</dc:creator>
    <dc:date>2017-07-08T14:21:43Z</dc:date>
    <item>
      <title>Interfacing OV7251 single lane MIPI sensor with iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/688997#M106673</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am trying to interface the single lane MIPI sensor OV7251 sensor with imx6.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;MIPI_CSI_PHY_STATE register value is continuously changing between 0x0000_0300 and 0x0000_0310. MIPI_CSI_ERR1 and MIPI_CSI_ERR2 status registers are also zero. But Frames are not coming to memory. please let me know if any body faced this issue?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If i probed the MIPI clock and MIPI data lines from sensor , it is toggling&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Settings at imx6 side:&lt;/P&gt;&lt;P&gt;&amp;nbsp;MIPI D-PHY clock &amp;nbsp;= &amp;nbsp;0x2a ( 330 to 360 Mhz)&lt;/P&gt;&lt;P&gt;IPU0, CSI1, &amp;nbsp;Virtual channel 0&lt;/P&gt;&lt;P&gt;Data type =0x2A&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;settings at sensor side&lt;/P&gt;&lt;P&gt;sensor's MIPI Clock lane frequency = 112MhZ&lt;/P&gt;&lt;P&gt;MIPI Data type = &amp;nbsp;0x 2A&lt;/P&gt;&lt;P&gt;Resolution : 640 x 480&lt;/P&gt;&lt;P&gt;Frames : 30fps&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Q1. Is the above status registers denotes iMX6 receiving MIPI packets or not? . Since check sum error also zero.&lt;/P&gt;&lt;P&gt;Q2 .How should I know weather iMX6 received MIPI packets or not?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Q3. we have configured single lane in imx6 dts file. Is there other things need to configure at imx6 side for single lane? Q4. anybody interfaced 0V7251 single lane MIPI with imx6?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Ta##@milarasan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 08 Jul 2017 14:21:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/688997#M106673</guid>
      <dc:creator>tamilarasane</dc:creator>
      <dc:date>2017-07-08T14:21:43Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing OV7251 single lane MIPI sensor with iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/688998#M106674</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tamilarasan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;MIPI_CSI_PHY_STATE bits 8 and 9 must be 1 (0x300) and bits 4~7 will &lt;BR /&gt;toggle according to the moment you read the register and the state of the transmission. &lt;BR /&gt;In case of sabresd, as it uses only 2 lanes, this register will toggle from 0x300 to 0x330.&lt;BR /&gt;Data type =&amp;nbsp; 0x 2A&amp;nbsp; means raw data one can look for such data type cameras at&lt;BR /&gt;&lt;A class="jive-link-thread-small" data-containerid="2004" data-containertype="14" data-objectid="320618" data-objecttype="1" href="https://community.nxp.com/thread/320618"&gt;https://community.nxp.com/thread/320618&lt;/A&gt;&lt;BR /&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/message/344529#344529"&gt;https://community.nxp.com/message/344529#344529&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 09 Jul 2017 23:06:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/688998#M106674</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-07-09T23:06:04Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing OV7251 single lane MIPI sensor with iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/688999#M106675</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Thank you. &amp;nbsp;it is worked now&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Jul 2017 13:08:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/688999#M106675</guid>
      <dc:creator>tamilarasane</dc:creator>
      <dc:date>2017-07-13T13:08:15Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing OV7251 single lane MIPI sensor with iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/689000#M106676</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tamilarasan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Very nice to hear, that all works now for you. Congrats.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am up to the exact same task to connect an OV7251 sensor to an imx6. Would be great, if you could share your knowledge, such that I do not have to reinvent the wheel.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance and best regards&lt;/P&gt;&lt;P&gt;Tonio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 22 Aug 2017 07:32:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/689000#M106676</guid>
      <dc:creator>tgs</dc:creator>
      <dc:date>2017-08-22T07:32:24Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing OV7251 single lane MIPI sensor with iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/689001#M106677</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tonio,&lt;/P&gt;&lt;P&gt;Where you are and what is the issue you are facing?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Tamilarasan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Aug 2017 06:03:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/689001#M106677</guid>
      <dc:creator>tamilarasane</dc:creator>
      <dc:date>2017-08-28T06:03:41Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing OV7251 single lane MIPI sensor with iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/689002#M106678</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Tamilarasan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We also developed a partially working driver for the ov7251 here.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We had issues setting up the IPU to pipe the raw video data. We made it work, but at the moment we still have to post-process the data with the CPU to get a proper image (bitshifting &amp;amp; column flipping) which is taking up too many resources.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you maybe give me some hints how you handled the processing in the IPU?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This would be really helpful!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Lukas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 16 Apr 2018 10:54:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/689002#M106678</guid>
      <dc:creator>lukasmeier</dc:creator>
      <dc:date>2018-04-16T10:54:40Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing OV7251 single lane MIPI sensor with iMX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/1412018#M186880</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/39077"&gt;@tamilarasane&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;I'm also looking to interface a OV7251 camera to work with an iMX6, using a 5.4.84 kernel. I ported over the standard subdevice based driver in the kernel to be a V4L2 internal device, and am seeing the MIPI DPHY STATE register toggle from 0x300 and 0x310 and am not seeing any errors reported on the CSI bus, but am not receiving any frames to the IPU. Can you provide any recommendations on next steps?&lt;/P&gt;&lt;P&gt;Any help is appreciated.&lt;/P&gt;&lt;P&gt;Best,&lt;/P&gt;</description>
      <pubDate>Thu, 10 Feb 2022 20:40:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interfacing-OV7251-single-lane-MIPI-sensor-with-iMX6/m-p/1412018#M186880</guid>
      <dc:creator>mablabs</dc:creator>
      <dc:date>2022-02-10T20:40:36Z</dc:date>
    </item>
  </channel>
</rss>

