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    <title>topic Re: iMX28 BOOT_MODE bits in HW_OCOTP_ROM0, ROM Bootloader Codes in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX28-BOOT-MODE-bits-in-HW-OCOTP-ROM0-ROM-Bootloader-Codes/m-p/196106#M10415</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Draghi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Table 12.1 in i.MX28 Reference Manual Rev 1 lists all the boot mode supported by i.MX28 ROM. The BOOT_MODE field (bit 31-24) in HW_OCOTP_ROM0 also follows this table. (HW_OCOTP_ROM0[27:24] maps to BM3-BM0, HW_OCOTP_ROM0[28] maps to voltage selector)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The ENABLE_PIN_BOOT_CHECK bit in HW_OCOTP_ROM7 is also relevant to boot loader. Blow this bit to enable boot loader to first test the LCD_RS pin to determine if the pin boot mode is enabled.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If this bit is blown and LCD_RS is pulled high, then boot mode is determined by the state of LCD_D[5:0] pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If this bit is blown and LCD_RS is pulled low, then boot mode is determined by the BOOT_MODE field in HW_OCOTP_ROM0.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If this bit is not blown, the LCD_RS pin testing will be skipped and boot mode is always determined by the state of LCD_D[5:0] pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, please pull the LCD_RS pin to the right direction after the ENABLE_PIN_BOOT_CHECK bit is blown.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;Peter&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 04 Oct 2012 03:05:43 GMT</pubDate>
    <dc:creator>PeterChan</dc:creator>
    <dc:date>2012-10-04T03:05:43Z</dc:date>
    <item>
      <title>iMX28 BOOT_MODE bits in HW_OCOTP_ROM0, ROM Bootloader Codes</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX28-BOOT-MODE-bits-in-HW-OCOTP-ROM0-ROM-Bootloader-Codes/m-p/196105#M10414</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have the following problem: on the HW prototype I received for a new iMX28 board the LCD_RS was left open instead of being pulled high in order to boot as specified by the BM3-BM0 pins. Although LCD_RS ins not pulled low either, I assume the device is now booting as specified by the OTP. However the BOOT_MODE field (bits 24-31) are not documented in HW_OCOTP_ROM0 (20.4.7, page 1447 in iMX28 Application Processor Reference Manual, Rev. 1, 2010).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I want to boot from SSP0 from a SD card at 3.3V.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can somebody document these bits? How are BM3-BM1, voltage selector and ETM enabler mapped on the BOOT_MODE field bits on the HW_OCOTP_ROM0? Are there also other relevant bits in this field I should be aware of? Learning by doing is clearly not an option for OTP :smileywink:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What are the codes the ROM bootloader is sending via the DEBUG UART (something like H0x80201005, etc) ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help would be greatly appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Draghi Puterity&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Sep 2012 10:15:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX28-BOOT-MODE-bits-in-HW-OCOTP-ROM0-ROM-Bootloader-Codes/m-p/196105#M10414</guid>
      <dc:creator>mp_baum_de</dc:creator>
      <dc:date>2012-09-19T10:15:09Z</dc:date>
    </item>
    <item>
      <title>Re: iMX28 BOOT_MODE bits in HW_OCOTP_ROM0, ROM Bootloader Codes</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX28-BOOT-MODE-bits-in-HW-OCOTP-ROM0-ROM-Bootloader-Codes/m-p/196106#M10415</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Draghi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Table 12.1 in i.MX28 Reference Manual Rev 1 lists all the boot mode supported by i.MX28 ROM. The BOOT_MODE field (bit 31-24) in HW_OCOTP_ROM0 also follows this table. (HW_OCOTP_ROM0[27:24] maps to BM3-BM0, HW_OCOTP_ROM0[28] maps to voltage selector)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The ENABLE_PIN_BOOT_CHECK bit in HW_OCOTP_ROM7 is also relevant to boot loader. Blow this bit to enable boot loader to first test the LCD_RS pin to determine if the pin boot mode is enabled.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If this bit is blown and LCD_RS is pulled high, then boot mode is determined by the state of LCD_D[5:0] pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If this bit is blown and LCD_RS is pulled low, then boot mode is determined by the BOOT_MODE field in HW_OCOTP_ROM0.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If this bit is not blown, the LCD_RS pin testing will be skipped and boot mode is always determined by the state of LCD_D[5:0] pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, please pull the LCD_RS pin to the right direction after the ENABLE_PIN_BOOT_CHECK bit is blown.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;Peter&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 04 Oct 2012 03:05:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX28-BOOT-MODE-bits-in-HW-OCOTP-ROM0-ROM-Bootloader-Codes/m-p/196106#M10415</guid>
      <dc:creator>PeterChan</dc:creator>
      <dc:date>2012-10-04T03:05:43Z</dc:date>
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