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    <title>topic Re: Conflicting documentation on boot config pins for IMX6UL in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Conflicting-documentation-on-boot-config-pins-for-IMX6UL/m-p/674741#M104028</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; The RM is correct : MMC 0x - Normal Speed Mode, 1x - High Speed mode.&lt;/P&gt;&lt;P&gt;Thanks for Your pointing this inaccuracy in the schematic table. &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 28 Jun 2017 05:59:49 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2017-06-28T05:59:49Z</dc:date>
    <item>
      <title>Conflicting documentation on boot config pins for IMX6UL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Conflicting-documentation-on-boot-config-pins-for-IMX6UL/m-p/674740#M104027</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;On Document SPF-28617_C5 (Schematics of DevBoard), Sheet 9, first table at top left, under column: BOOT_CFG1[3], row MMC/eMMC, the cell states that a 0 configures eMMC for High speed, and a 1 sets it to low speed. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, in the reference manual (&lt;A href="http://www.nxp.com/docs/en/reference-manual/IMX6ULRM.pdf"&gt;http://www.nxp.com/docs/en/reference-manual/IMX6ULRM.pdf&lt;/A&gt;), page 274, Table8-15, top row (0x450[3:2]) it states the opposite: MMC 0x - Normal Speed Mode, 1x - High Speed mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Which one is it??&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 27 Jun 2017 20:03:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Conflicting-documentation-on-boot-config-pins-for-IMX6UL/m-p/674740#M104027</guid>
      <dc:creator>gerardobarroeta</dc:creator>
      <dc:date>2017-06-27T20:03:41Z</dc:date>
    </item>
    <item>
      <title>Re: Conflicting documentation on boot config pins for IMX6UL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Conflicting-documentation-on-boot-config-pins-for-IMX6UL/m-p/674741#M104028</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; The RM is correct : MMC 0x - Normal Speed Mode, 1x - High Speed mode.&lt;/P&gt;&lt;P&gt;Thanks for Your pointing this inaccuracy in the schematic table. &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 Jun 2017 05:59:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Conflicting-documentation-on-boot-config-pins-for-IMX6UL/m-p/674741#M104028</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2017-06-28T05:59:49Z</dc:date>
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