topic Re: UART transmitter complete interrupt timing in i.MX Processors

UART transmitter complete interrupt timing

masatsuguyamada — Mon, 05 Jun 2017 09:38:29 GMT

Hi,
We are using i.MX6 (MCIMX6Q7CVT08AC) on custom board, and trying to make RS-485 communication for Modbus RTU.

RTS pin of RS-485 transceiver (externally attached, ADM2485) is connected to i.MX6 GPIO, and we control the GPIO for half duplex send / receive change.

Controlling GPIO from user process were not stable for real-time use, so we are trying to control GPIO (RS-485 transceiver / RTS) from Linux kernel space, using UART send interrupt.

From our trial, using interrupt handler imx_txint() of i.MX6 serial driver (driver/tty/serial/imx.c), we could see two interrupt by oscilloscope,

(a) Transmit Buffer FIFO empty (UARTx_USR2 / TXEF)
--> The interrupt was 2 byte earlier from complete sending.

(b) Transmitter Complete (UARTx_USR2 / TXDC)
         --> The interrupt was observed 1.6~4.4ms after complete sending.
               Unfortunately our external Modbus device sends response before this
               interrupt, so RTS control by this interrupt doesn't meet deadline.

***(a)(b)
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
p.5263

My question is,
(1) Is there any trigger that we can notice complete transmitting UART data?
TXDC interrupt corresponds to that?
(2) Can the delay of TXDC (observed 1.6~4.4ms) be shorten by some register setting?

Thanks in advance,
Yamada

Re: UART transmitter complete interrupt timing

Yuri — Wed, 07 Jun 2017 06:22:53 GMT

Hello,

Please look at my comments below.

Yes, TXDC (Transmitter Complete) bit indicates that the transmit buffer (TxFIFO) and Shift Register is empty;
therefore the transmission is complete.

I think the scheme You use - with GPIO control under Linux - hardly can meet Modbus requirements.

There are a lot RS232-RS485 automatic converters. These converters contains a fast automatic TX enable

circuit.

Have a great day,
Yuri

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Re: UART transmitter complete interrupt timing

masatsuguyamada — Thu, 08 Jun 2017 07:46:02 GMT

Hi Yuri,

Thanks for the advice, I understand the TXDC is the expected trigger,
also I have considered using timer IC for RTS control, so your advice was very helpful.

Regards,
Yamada