<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Problems about LAN8720a in u-boot-2009.08</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Problems-about-LAN8720a-in-u-boot-2009-08/m-p/674015#M103858</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi,igor&lt;/P&gt;&lt;P&gt;I've patched it, but it doesn't work. Do you have any other idea about it?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 27 Jun 2017 14:36:12 GMT</pubDate>
    <dc:creator>sunnyvan</dc:creator>
    <dc:date>2017-06-27T14:36:12Z</dc:date>
    <item>
      <title>Problems about LAN8720a in u-boot-2009.08</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problems-about-LAN8720a-in-u-boot-2009-08/m-p/674013#M103856</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi,&lt;BR /&gt;I use LAN8720A and RMII connection to IMX6Q and it works well in kernel 3.10.35,but it does't work in u-boot-2009.08.&lt;/DIV&gt;&lt;DIV&gt;when I ping my host,it replies as follows:&lt;/DIV&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;DIV&gt;MX6Q SABRESD U-Boot &amp;gt; ping 192.168.2.101&amp;nbsp; &lt;BR /&gt;ping failed; host 192.168.2.101 is not alive&lt;BR /&gt;MX6Q SABRESD U-Boot &amp;gt; ping 192.168.2.101&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt;fec_mii_phy_init: info-&amp;gt;phy_addr=0x0&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt;fec_init: info-&amp;gt;phy_addr=0x0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt;FEC: Link is Up 782d&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt;Using FEC0 device&amp;nbsp;&amp;nbsp; &lt;BR /&gt;ping failed; host 192.168.2.101 is not alive&lt;/DIV&gt;&lt;DIV&gt;MX6Q SABRESD U-Boot &amp;gt; mii device&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt;MII devices: 'FEC0'&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt;Current device: 'FEC0'&lt;/DIV&gt;&lt;DIV&gt;MX6Q SABRESD U-Boot &amp;gt; mii dump&lt;BR /&gt;Error reading from the PHY addr=00 reg=00&lt;/DIV&gt;&lt;/BLOCKQUOTE&gt;&lt;DIV&gt;&lt;P&gt;&lt;/P&gt;I can't read or write registers by mii read or mii write,it also replies &lt;BR /&gt;Error reading from the PHY addr=00 reg=00&lt;/DIV&gt;&lt;DIV&gt;My env variables are as follows:&lt;/DIV&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;"netdev=eth0\0"&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"ethprime=FEC0\0"&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"uboot=u-boot.bin\0"&amp;nbsp;&amp;nbsp;&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"kernel=uImage\0"&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"ethaddr=1E:ED:19:27:1A:B3\0"&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"nfsroot=/home/van/nfsroot\0"&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"bootargs_base=setenv bootargs console=ttymxc0,115200\0"\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"bootcmd_net=run bootargs_base bootargs_nfs; "&amp;nbsp;&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;"tftpboot ${loadaddr} ${kernel}; bootm\0"&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"bootargs_mmc=setenv bootargs ${bootargs} ip=none "&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; \&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;"root=/dev/mmcblk0p1 rootwait video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666 ldb=sep0\0"&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; \&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"bootcmd_mmc=run bootargs_base bootargs_mmc; "&amp;nbsp;&amp;nbsp; \&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"mmc dev 2; "&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"mmc read ${loadaddr} 0x800 0x2000; bootm\0"&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"bootcmd=run bootcmd_mmc\0"&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; \&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"update_uboot=tftpboot ${loadaddr} u-boot.bin; sf probe 1; sf erase 0 0x80000; sf write ${loadaddr} 0 0x80000\0"&amp;nbsp;&amp;nbsp; \&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"splashimage=0x30000000\0"&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"splashpos=m,m\0"&amp;nbsp;\&lt;BR /&gt;&amp;nbsp;&amp;nbsp;"lvds_num=1\0"&lt;/DIV&gt;&lt;/BLOCKQUOTE&gt;&lt;DIV&gt;Seen below for my schematic diagram:&lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="2.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/24243i4E59A15FD024B82A/image-size/large?v=v2&amp;amp;px=999" role="button" title="2.JPG" alt="2.JPG" /&gt;&lt;/span&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="3.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/24274iA6988AF8EAC07EE3/image-size/large?v=v2&amp;amp;px=999" role="button" title="3.JPG" alt="3.JPG" /&gt;&lt;/span&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="1.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/24310i04053F6020065875/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.JPG" alt="1.JPG" /&gt;&lt;/span&gt;&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;and the enet_pads table is as follows:&lt;/DIV&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;DIV&gt;iomux_v3_cfg_t enet_pads[] = {&lt;BR /&gt;#ifdef CONFIG_ENET_RMII&lt;BR /&gt;&amp;nbsp;/* ENET (10/100Mbps enet interface)*/&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_MDIO__ENET_MDIO,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_MDC__ENET_MDC,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_RX_ER__ENET_RX_ER,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_TX_EN__ENET_TX_EN,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_RXD0__ENET_RDATA_0,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_RXD1__ENET_RDATA_1,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_TXD0__ENET_TDATA_0,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_TXD1__ENET_TDATA_1,&amp;nbsp;&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT,&lt;BR /&gt;&amp;nbsp;MX6Q_PAD_ENET_REF_CLK__GPIO_1_23, /* reset phy */&lt;BR /&gt;#endif&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;#define CONFIG_ENET_RMII&lt;BR /&gt;#define CONFIG_FEC0_IOBASE&amp;nbsp;ENET_BASE_ADDR&lt;BR /&gt;#define CONFIG_FEC0_PINMUX&amp;nbsp;&amp;nbsp;-1&lt;BR /&gt;#define CONFIG_FEC0_MIIBASE&amp;nbsp;&amp;nbsp;-1&lt;BR /&gt;#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM&lt;BR /&gt;#define CONFIG_MXC_FEC&lt;BR /&gt;#define CONFIG_FEC0_PHY_ADDR&amp;nbsp;&amp;nbsp;0xFF&lt;BR /&gt;#define CONFIG_DISCOVER_PHY&lt;BR /&gt;#define CONFIG_ETH_PRIME&lt;BR /&gt;#define CONFIG_RMII&lt;BR /&gt;#define CONFIG_CMD_MII&lt;BR /&gt;#define CONFIG_CMD_DHCP&lt;BR /&gt;#define CONFIG_CMD_PING&lt;BR /&gt;#define CONFIG_IPADDR&amp;nbsp;&amp;nbsp;&amp;nbsp;192.168.2.103&lt;BR /&gt;#define CONFIG_SERVERIP&amp;nbsp;&amp;nbsp;&amp;nbsp;192.168.2.105&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;and the reset function is :&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;gpio_direction_output(FEC_PHY_RESET, 0);&lt;BR /&gt;&amp;nbsp;udelay(5000);&lt;BR /&gt;&amp;nbsp;gpio_set_value(FEC_PHY_RESET, 1);&lt;BR /&gt;&amp;nbsp;/* Set GPIO_16 output for RMII reference clock&lt;BR /&gt;&amp;nbsp; * For MX6 GPR1 bit21 meaning:&lt;BR /&gt;&amp;nbsp; * Bit21:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1 - GPIO_16 pad output&lt;BR /&gt;&amp;nbsp; *&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 - GPIO_16 pad input&lt;BR /&gt;&amp;nbsp; * Use interal clock, set GPIO_16 output, and&lt;BR /&gt;&amp;nbsp; * then force input(set SION)&lt;BR /&gt;&amp;nbsp; * Use exteral clock, set GPIO_16 input, and&lt;BR /&gt;&amp;nbsp; * don't set SION bit.&lt;BR /&gt;&amp;nbsp; */&lt;BR /&gt;&amp;nbsp;mxc_iomux_set_gpr_register(1, 21, 1, 1);&lt;/DIV&gt;&lt;/BLOCKQUOTE&gt;&lt;DIV&gt;&lt;P&gt;&lt;/P&gt;&lt;BR /&gt;I can measure 50MHZ waveform on GPIO_16.The default PHY is for AR8031,how can modify the codes for LAN8720A in u-boot-2009.08?Is there any patches for this?&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Jun 2017 09:53:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problems-about-LAN8720a-in-u-boot-2009-08/m-p/674013#M103856</guid>
      <dc:creator>sunnyvan</dc:creator>
      <dc:date>2017-06-26T09:53:27Z</dc:date>
    </item>
    <item>
      <title>Re: Problems about LAN8720a in u-boot-2009.08</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problems-about-LAN8720a-in-u-boot-2009-08/m-p/674014#M103857</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi SUNNY&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please check rmii patch (&lt;A _jive_internal="true" class="link-titled" href="https://community.nxp.com/servlet/JiveServlet/download/398432-1-274101/MX6_enet_RMII.zip" title="https://community.nxp.com/servlet/JiveServlet/download/398432-1-274101/MX6_enet_RMII.zip"&gt;https://community.nxp.com/servlet/JiveServlet/download/398432-1-274101/MX6_enet_RMII.zip&lt;/A&gt;&amp;nbsp;) on&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" class="link-titled" href="https://community.nxp.com/thread/304346?commentID=331971#comment-331971" title="https://community.nxp.com/thread/304346?commentID=331971#comment-331971"&gt;https://community.nxp.com/thread/304346?commentID=331971#comment-331971&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Jun 2017 10:31:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problems-about-LAN8720a-in-u-boot-2009-08/m-p/674014#M103857</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-06-26T10:31:28Z</dc:date>
    </item>
    <item>
      <title>Re: Problems about LAN8720a in u-boot-2009.08</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problems-about-LAN8720a-in-u-boot-2009-08/m-p/674015#M103858</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi,igor&lt;/P&gt;&lt;P&gt;I've patched it, but it doesn't work. Do you have any other idea about it?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 27 Jun 2017 14:36:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problems-about-LAN8720a-in-u-boot-2009-08/m-p/674015#M103858</guid>
      <dc:creator>sunnyvan</dc:creator>
      <dc:date>2017-06-27T14:36:12Z</dc:date>
    </item>
  </channel>
</rss>

