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    <title>topic i.MX7D Boundary Scan in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7D-Boundary-Scan/m-p/673478#M103770</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are trying to get boundary scan to work with Cascon on our phyCORE-i.MX7D SOM. According to the Hardware Development Guide,&amp;nbsp;Table 8:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; “5. If boundary scan test (BSDL) will be used, the following supplies must be powered: PCIE_VP, PCIE_VPH, PCIE_VPTX. The boundary scan test scan chain runs through the PCIe PHY. If the PCIe PHY supplies are not powered, the scan chain will not function.”&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;See the corresponding connections in our schematic below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17994i276A341CD0095E31/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For some reason, our scan chain is having issues. We are following the compliance pattern detailed in the hardware development guide (setting JTAG_MOD pin high, releasing POR_B) and have also tested with and without a PCIe device connected in u-boot and Linux, but in all cases the test byte that we shift into TDI is not read out of TDO correctly.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We can turn on the VDDD_1V0_CAP rail by doing a register write in u-boot to&amp;nbsp;0x30360210, but we have not found a way to turn on VDDA_PHY_1P8 without booting into Linux with a PCIe device connected. Do you know if there's a way to do this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you have any idea what might be going wrong with our scan chain?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 09 May 2017 12:30:21 GMT</pubDate>
    <dc:creator>ericschumann</dc:creator>
    <dc:date>2017-05-09T12:30:21Z</dc:date>
    <item>
      <title>i.MX7D Boundary Scan</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7D-Boundary-Scan/m-p/673478#M103770</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are trying to get boundary scan to work with Cascon on our phyCORE-i.MX7D SOM. According to the Hardware Development Guide,&amp;nbsp;Table 8:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; “5. If boundary scan test (BSDL) will be used, the following supplies must be powered: PCIE_VP, PCIE_VPH, PCIE_VPTX. The boundary scan test scan chain runs through the PCIe PHY. If the PCIe PHY supplies are not powered, the scan chain will not function.”&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;See the corresponding connections in our schematic below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17994i276A341CD0095E31/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For some reason, our scan chain is having issues. We are following the compliance pattern detailed in the hardware development guide (setting JTAG_MOD pin high, releasing POR_B) and have also tested with and without a PCIe device connected in u-boot and Linux, but in all cases the test byte that we shift into TDI is not read out of TDO correctly.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We can turn on the VDDD_1V0_CAP rail by doing a register write in u-boot to&amp;nbsp;0x30360210, but we have not found a way to turn on VDDA_PHY_1P8 without booting into Linux with a PCIe device connected. Do you know if there's a way to do this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you have any idea what might be going wrong with our scan chain?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 May 2017 12:30:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX7D-Boundary-Scan/m-p/673478#M103770</guid>
      <dc:creator>ericschumann</dc:creator>
      <dc:date>2017-05-09T12:30:21Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX7D Boundary Scan</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7D-Boundary-Scan/m-p/673479#M103771</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Eric,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Your BSDL File is from may last year and seems up to date.&lt;/P&gt;&lt;P&gt;What about&amp;nbsp;PCIE_VP_TX, PCIE_VP_RX: must be at 1.0V too.&amp;nbsp;And PCIE_VPH_TX, PCIE_VPH_RX @ 1.8V&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;kind regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Rodrigue&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 May 2017 09:29:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX7D-Boundary-Scan/m-p/673479#M103771</guid>
      <dc:creator>Rodrigue</dc:creator>
      <dc:date>2017-05-15T09:29:34Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX7D Boundary Scan</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX7D-Boundary-Scan/m-p/673480#M103772</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; is it possible to create request (ticket) ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://www.nxp.com/support/sales-and-support:SUPPORTHOME" title="http://www.nxp.com/support/sales-and-support:SUPPORTHOME"&gt;Sales and Support|NXP&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 May 2017 05:16:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX7D-Boundary-Scan/m-p/673480#M103772</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2017-05-16T05:16:13Z</dc:date>
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