i.MX ProcessorsのトピックRe: iMX7 Fails to reboot second A7 core.

iMX7 Fails to reboot second A7 core.

zaidiabbas — Fri, 14 Jul 2017 10:13:23 GMT

Hi,

I am trying to reboot second A7 core from the first A7 core repeatedly. on the 8th attempt to boot the second A7 core system stops responding. I have attached a small piece of code that reproduces the issue with me. I have been building it using the codesourcery gnu tool chain using the following command.

$ arm-none-eabi-gcc -gdwarf-2 -mthumb-interwork -msoft-float -mcpu=cortex-a7 -T link_ram.ld main_freescale.c

Here is a brief description of the program attached.

Core 0 runs the function main(). It repeatedly boots the second core with the entry function core2_func().
Core 1 runs core2_func and sends a signal to Core 0 with variable core2_countup.
Core 0 on receiving signal shuts down Core 1 and reboots Core 1 again

Variable cpu1_boot_trig_cnt tells how many time Core 1 has been powered up.
Variable cpu1_boot_cnt tells how many time Core 1 has successfully been powered up.

board: MCIMX7 SABRE

Kernel or BSP: Bare metal

ToolChain: gcc version 6.2.0 (Sourcery CodeBench 2016.11-51)
Frequency of reproducible: Always

Steps to reproduce: Build the code load it on core 0 and let it run. When paused cpu1_boot_cnt is stuck at 7. on connecting second A7 core to JTAG. The cpu is in wage state, unable to access memory or registers trhough debug.

Regards,

Abbas Zaidi

Original Attachment has been moved to: bme.zip

Re: iMX7 Fails to reboot second A7 core.

JayTu — Fri, 14 Jul 2017 20:55:46 GMT

This is quite interesting! I guess you are loading it through JTAG, but have you configured memory?

How about porting it to u-boot for the testing? Probably, some modules caused the hang. (i.e., CCM)

Re: iMX7 Fails to reboot second A7 core.

igorpadykov — Sun, 16 Jul 2017 23:01:59 GMT

Hi Zaidi

since stucking happens after several attempts one can assume that
this may be due to power reasons. One can try not to use GPC and
only stop/reset second core using SRC registers. If this helps, later one can
add delays after GPC power up/down to allow internal power supply to become
stable before proceeding next code execution. Another option to try to narrow
down issue, try to use internal ram (starting from 0x00910000).

Best regards
igor
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Re: iMX7 Fails to reboot second A7 core.

zaidiabbas — Wed, 19 Jul 2017 14:28:12 GMT

Thanks JayTu,

I tried loading image with u-boot, i let it run for a while and when I connect the core 0 with JTAG. The results are same.

My u-boot version is U-Boot 2015.04-imx_v2015.04_4.1.15_1.0.0_ga+g384e1c1

Re: iMX7 Fails to reboot second A7 core.

JayTu — Wed, 19 Jul 2017 16:09:52 GMT

Please attach your code and list the reproduced step, I'll find the time to check it.

Re: iMX7 Fails to reboot second A7 core.

zaidiabbas — Fri, 21 Jul 2017 06:44:21 GMT

Hi JayTu,

I have already attached the code in my original post with the command line to build it.

Re: iMX7 Fails to reboot second A7 core.

JayTu — Fri, 21 Jul 2017 06:47:48 GMT

I mean the one you port it to u-boot.

Re: iMX7 Fails to reboot second A7 core.

zaidiabbas — Fri, 21 Jul 2017 08:10:52 GMT

Its the same code. I load the generated binary to address 0x90100000 and then enter command

$ go 0x90100108

on u-boot.

Do i need to modify it for u-boot? Not sure what sort of modifications are needed.

Re: iMX7 Fails to reboot second A7 core.

JayTu — Fri, 21 Jul 2017 08:28:36 GMT

Integrated to uboot means that you will make it as U_BOOT_CMD. We can then build and run as usual way.

Re: iMX7 Fails to reboot second A7 core.

zaidiabbas — Fri, 28 Jul 2017 13:29:27 GMT

Hi,

As you advised instead of using GPC now I am only using SRC registers (SRC_A7RCR1 and SRC_SCR) to enable/diasble core_1 and reset core_1, and the results are same. On the 8th reboot second core fails.

Re: iMX7 Fails to reboot second A7 core.

igorpadykov — Fri, 28 Jul 2017 23:59:33 GMT

what do you mean by "core fails", if it hangs or jumps to
exception, if yes one can check stack pointer and debug it more.
Also one can try to run test from OCRAM, to check if this is cased by ddr memory.