<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Moving MIPI VC0 to IPU0-CSI1 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Moving-MIPI-VC0-to-IPU0-CSI1/m-p/669002#M102945</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are working on an IMX6D design where we want to use the 2 parallel inputs and a mipi channel to support 3 analog cameras (simultaneously). &amp;nbsp;The problem we have run into is that the MIPI chip only transmits as VC0 (Virtual Channel 0). &amp;nbsp;And on the imx6, VC0 only muxes into IPU0-CSI0. &amp;nbsp;Is there some way to have the gasket forward VC0 to either IPU0-CSI1 or IPU1-CSI0?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 04 May 2017 22:19:15 GMT</pubDate>
    <dc:creator>richogrady</dc:creator>
    <dc:date>2017-05-04T22:19:15Z</dc:date>
    <item>
      <title>Moving MIPI VC0 to IPU0-CSI1</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Moving-MIPI-VC0-to-IPU0-CSI1/m-p/669002#M102945</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are working on an IMX6D design where we want to use the 2 parallel inputs and a mipi channel to support 3 analog cameras (simultaneously). &amp;nbsp;The problem we have run into is that the MIPI chip only transmits as VC0 (Virtual Channel 0). &amp;nbsp;And on the imx6, VC0 only muxes into IPU0-CSI0. &amp;nbsp;Is there some way to have the gasket forward VC0 to either IPU0-CSI1 or IPU1-CSI0?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 04 May 2017 22:19:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Moving-MIPI-VC0-to-IPU0-CSI1/m-p/669002#M102945</guid>
      <dc:creator>richogrady</dc:creator>
      <dc:date>2017-05-04T22:19:15Z</dc:date>
    </item>
    <item>
      <title>Re: Moving MIPI VC0 to IPU0-CSI1</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Moving-MIPI-VC0-to-IPU0-CSI1/m-p/669003#M102946</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;for mx6DQ:&lt;/P&gt;&lt;P style="margin-left: 0.5in;"&gt;&lt;SPAN style="color: #0070c0;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;SPAN style="color: #000000;"&gt; IPU0-CSI0: can be connected to parallel interface(GPR1 bit19 is 1) or to mipi-csi2 virtual channel0(GPR1 bit19 is 0).&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin-left: 0.5in;"&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; IPU0-CSI1:can only be connected to mipi-csi2 virtual channel1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin-left: 0.5in;"&gt;&lt;SPAN style="color: #000000;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; IPU1-CSI0:can only be connected to mipi-csi2 virtual channel2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin-left: 0.5in; text-indent: 27.5pt;"&gt;&lt;SPAN style="color: #000000;"&gt;IPU1-CSI1: can be connected to parallel interface(GPR1 bit20 is 1) or to mipi-csi2 virtual channel3(GPR1 bit 20 is 0).&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 May 2017 07:59:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Moving-MIPI-VC0-to-IPU0-CSI1/m-p/669003#M102946</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2017-05-09T07:59:28Z</dc:date>
    </item>
  </channel>
</rss>

