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    <title>topic IMX6UL processor SD lines related query in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX6UL-processor-SD-lines-related-query/m-p/668757#M102895</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;Imx6UL NXP EVK board design - In SD1 CMD and DATA0 lines only have external pull-up.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;1. Why CMD and Data0 lines has pulled-up any specific reasons related to processor ?&lt;/P&gt;&lt;P&gt;2. Why other Data lines doesn't have Pull-ups?&lt;/P&gt;&lt;P&gt;3. By processor default it has Internal pull-up, so we didn't use external pull-ups?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Rameshkumar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 05 May 2017 05:44:26 GMT</pubDate>
    <dc:creator>ramesh6663</dc:creator>
    <dc:date>2017-05-05T05:44:26Z</dc:date>
    <item>
      <title>IMX6UL processor SD lines related query</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6UL-processor-SD-lines-related-query/m-p/668757#M102895</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;Imx6UL NXP EVK board design - In SD1 CMD and DATA0 lines only have external pull-up.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;1. Why CMD and Data0 lines has pulled-up any specific reasons related to processor ?&lt;/P&gt;&lt;P&gt;2. Why other Data lines doesn't have Pull-ups?&lt;/P&gt;&lt;P&gt;3. By processor default it has Internal pull-up, so we didn't use external pull-ups?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Rameshkumar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 May 2017 05:44:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6UL-processor-SD-lines-related-query/m-p/668757#M102895</guid>
      <dc:creator>ramesh6663</dc:creator>
      <dc:date>2017-05-05T05:44:26Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6UL processor SD lines related query</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6UL-processor-SD-lines-related-query/m-p/668758#M102896</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello ramesh,&lt;/P&gt;&lt;P&gt;CPU PADs of SD1 list is from datasheet:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17920iB130A15419721EF1/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Recommended design from MMC protocol:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/18068i423A46C31E50B0BF/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;1. Why CMD and Data0 lines has pulled-up any specific reasons related to processor ?&lt;/P&gt;&lt;P&gt;According to SD protocol, all signal lines should have external pull-up resistors.&lt;/P&gt;&lt;P&gt;2. Why other Data lines doesn't have Pull-ups?&lt;/P&gt;&lt;P&gt;During initialization, only CMD and DATA0 line work, other data lines(DATA1--DATA3) are not used. After initialization, SD interface can be configured as 4-line mode, and there exists internal pull-up resistor on every SD pad, software can sets driving capability for these pads via configuring different pull-up resistors.&lt;/P&gt;&lt;P&gt;3. By processor default it has Internal pull-up, so we didn't use external pull-ups?&lt;/P&gt;&lt;P&gt;Yes, right.&lt;/P&gt;&lt;P&gt;But According to above list shown, if you don't configure pads in software, SD1 pads have no pull-up resistors! so you had better refer to EVK to design your schematic.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;wediong sun&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 May 2017 14:46:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6UL-processor-SD-lines-related-query/m-p/668758#M102896</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2017-05-05T14:46:10Z</dc:date>
    </item>
    <item>
      <title>Re: IMX6UL processor SD lines related query</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX6UL-processor-SD-lines-related-query/m-p/668759#M102897</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for your Great help.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 May 2017 07:24:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX6UL-processor-SD-lines-related-query/m-p/668759#M102897</guid>
      <dc:creator>ramesh6663</dc:creator>
      <dc:date>2017-05-23T07:24:04Z</dc:date>
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