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    <title>i.MX ProcessorsのトピックHow to change RAM Data Bus width imx6?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-change-RAM-Data-Bus-width-imx6/m-p/667710#M102715</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;UL&gt;&lt;LI&gt;I am trying to benchmark the effect of downsizing the RAM bus from 64 bus to 16 bits, so &lt;SPAN style="font-size: 11pt; color: #000000; background-color: transparent; font-weight: 400; text-decoration: none;"&gt;I used “DDRx register programming aid” file to get the dcd value for 16 bit bus width, it just changed the&amp;nbsp;the DSIZ-setting in the MDCTL-register of MMDC0&lt;/SPAN&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11pt; color: #000000; background-color: transparent; font-weight: 400; text-decoration: none;"&gt;DATA 4 0x021b0000 0x821&lt;/SPAN&gt;&lt;STRONG style="background-color: transparent; color: #ff0000; text-decoration: none; font-size: 11pt;"&gt;A&lt;/STRONG&gt;&lt;SPAN style="font-size: 11pt; color: #000000; background-color: transparent; font-weight: 400; text-decoration: none;"&gt;0000&lt;SPAN&gt;(for 64 bit bus)&lt;/SPAN&gt;&amp;nbsp;to DATA 4 0x021b0000 0x821&lt;/SPAN&gt;&lt;STRONG style="background-color: transparent; color: #ff0000; text-decoration: none; font-size: 11pt;"&gt;8&lt;/STRONG&gt;&lt;SPAN style="font-size: 11pt; color: #000000; background-color: transparent; font-weight: 400; text-decoration: none;"&gt;000 (for 16 bit bus)&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="color: #000000; font-size: 14.6667px;"&gt;But after changing the bus width from 64-bits to 16-bits in the DCD, only (1/4) of the RAM is read properly in initialization function of U-Boot ;int dram_init(void) uses the function get_ram_size to validate the RAM available.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="color: #000000;"&gt;&lt;SPAN style="font-size: 14.6667px;"&gt;Am I missing anything regarding this benchmark? how shall I change the bus width properly?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 30 May 2017 15:10:30 GMT</pubDate>
    <dc:creator>hishamelmeligi</dc:creator>
    <dc:date>2017-05-30T15:10:30Z</dc:date>
    <item>
      <title>How to change RAM Data Bus width imx6?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-change-RAM-Data-Bus-width-imx6/m-p/667710#M102715</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;UL&gt;&lt;LI&gt;I am trying to benchmark the effect of downsizing the RAM bus from 64 bus to 16 bits, so &lt;SPAN style="font-size: 11pt; color: #000000; background-color: transparent; font-weight: 400; text-decoration: none;"&gt;I used “DDRx register programming aid” file to get the dcd value for 16 bit bus width, it just changed the&amp;nbsp;the DSIZ-setting in the MDCTL-register of MMDC0&lt;/SPAN&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11pt; color: #000000; background-color: transparent; font-weight: 400; text-decoration: none;"&gt;DATA 4 0x021b0000 0x821&lt;/SPAN&gt;&lt;STRONG style="background-color: transparent; color: #ff0000; text-decoration: none; font-size: 11pt;"&gt;A&lt;/STRONG&gt;&lt;SPAN style="font-size: 11pt; color: #000000; background-color: transparent; font-weight: 400; text-decoration: none;"&gt;0000&lt;SPAN&gt;(for 64 bit bus)&lt;/SPAN&gt;&amp;nbsp;to DATA 4 0x021b0000 0x821&lt;/SPAN&gt;&lt;STRONG style="background-color: transparent; color: #ff0000; text-decoration: none; font-size: 11pt;"&gt;8&lt;/STRONG&gt;&lt;SPAN style="font-size: 11pt; color: #000000; background-color: transparent; font-weight: 400; text-decoration: none;"&gt;000 (for 16 bit bus)&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="color: #000000; font-size: 14.6667px;"&gt;But after changing the bus width from 64-bits to 16-bits in the DCD, only (1/4) of the RAM is read properly in initialization function of U-Boot ;int dram_init(void) uses the function get_ram_size to validate the RAM available.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="color: #000000;"&gt;&lt;SPAN style="font-size: 14.6667px;"&gt;Am I missing anything regarding this benchmark? how shall I change the bus width properly?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 May 2017 15:10:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-change-RAM-Data-Bus-width-imx6/m-p/667710#M102715</guid>
      <dc:creator>hishamelmeligi</dc:creator>
      <dc:date>2017-05-30T15:10:30Z</dc:date>
    </item>
    <item>
      <title>Re: How to change RAM Data Bus width imx6?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-change-RAM-Data-Bus-width-imx6/m-p/667711#M102716</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Hisham&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;in uboot please tweak ddr size in board file like:&lt;/P&gt;&lt;P&gt;uboot/include/configs/mx6sabresd.h&lt;/P&gt;&lt;P&gt;#define PHYS_SDRAM_SIZE&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;(1u * 1024 * 1024 * 1024)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 May 2017 23:19:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-change-RAM-Data-Bus-width-imx6/m-p/667711#M102716</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-05-30T23:19:41Z</dc:date>
    </item>
    <item>
      <title>Re: How to change RAM Data Bus width imx6?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-change-RAM-Data-Bus-width-imx6/m-p/667712#M102717</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;Igorpadykov&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please note that I don't want to change the RAM size, I want to change the RAM data bus width so that's why I am changing the DCD value.&lt;/P&gt;&lt;P&gt;The idea is that I have 4 DDR3 RAM chips sharing the 64 bit data address (each 16 bit).&amp;nbsp;When I down size the data bus to 16 bit only one of the chips is accessisble and that's why I have (1/4) of my RAM size.&lt;/P&gt;&lt;P&gt;I was hoping that changing the bus width doesn't affect the RAM size.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 May 2017 10:14:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-change-RAM-Data-Bus-width-imx6/m-p/667712#M102717</guid>
      <dc:creator>hishamelmeligi</dc:creator>
      <dc:date>2017-05-31T10:14:19Z</dc:date>
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