IMX6 - EIM/DDR3 interface

vijeshreddy — Mon, 29 May 2017 11:52:05 GMT

Hi,

I am new to linux,I am using Phyboard MIRA iMX6. My application is to read data from external SRAM and load it in DDR3 and process it.

We are using EIM module of iMX6 to read/write data from FPGA SRAM with chipselect 0, 16 address and datalines (multiplexed),read, write signals for this interface. 1GB DDR3 RAM is connected via MMDC.  I have gone through iMX6 data available on Internet and understood the following,  1. EIM Module should be enabled by doing the required pin muxing. 2. Address range of CS0 can be configured in the pin muxing itself. 3. A simple memory read/write functions supported by linux can be used to read and write the external memory.  Please clarify whether the above statements or valid, if not what is the usual method of accessing a memory over EIM Module. If you have any application note or sample code on EIM, please provide it will be very helpful for us.

Also how to create buffers in DDR3 ram. I want to create 3 buffers of size   128KB each starting from some fixed location. 

Thanks in advance.

Re: IMX6 - EIM/DDR3 interface

Yuri — Tue, 30 May 2017 04:05:02 GMT

Hello,

Please look at my comments below.

> EIM Module should be enabled by doing the required pin muxing.

In addition to reserving the needed pins, using pin mux-ing, it is required
to configure the EIM module. Please look at section 22.6 (Initialization Information) of the i.MX6 D/Q Reference Manual, linked below.

http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf

> Address range of CS0 can be configured in the pin muxing itself.

No, please look at section 22.4 (Chip Select Memory Map) about

EIM memory map configuring.

> A simple memory read/write functions supported by linux can be used
> to read and write the external memory.

Generally - yes.

> how to create buffers in DDR3 ram. I want to create 3 buffers of size
> 128KB each starting from some fixed location.

Linux memory allocation strategy does not allow to fix buffer addresses.

But this relates to DRAM memory. To support EIM address range, You may

design own EIM driver. As driver example :

Kernel_Unico/board-mx6q_sabreauto.c at master · UDOOboard/Kernel_Unico · GitHub

Have a great day,
Yuri

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IMX6 - EIM/DDR3 interface

Re: IMX6 - EIM/DDR3 interface