i.MX Processors中的主题 Re: QuadPlus DDR3 calibration/Test problem

QuadPlus DDR3 calibration/Test problem

nexy_sm — Thu, 23 Feb 2017 15:47:16 GMT

Hi all guys,

I am quite new, and unfortunately have some difficulties to bring my board with QuadPlus processor to work. Our design has 16bit wide data bus.

Namely, I run calibration procedure (528 MHz) and it starts with following info:

============================================
        DDR Stress Test (2.6.0)
        Build: Nov 18 2016, 23:40:32
        NXP Semiconductors.
============================================
============================================
        Chip ID
CHIP ID = i.MX6 Dual/Quad (0x63)
Internal Revision = TO2.0
============================================
============================================
        Boot Configuration
SRC_SBMR1(0x020d8004) = 0x00002000
SRC_SBMR2(0x020d801c) = 0x31000001
============================================
ARM Clock set to 1GHz
============================================
        DDR configuration
BOOT_CFG3[5-4]: 0x00, Single DDR channel.
DDR type is DDR3
Data width: 16, bank num: 8
Row size: 15, col size: 10
Chip select CSD0 is used
Density per chip select: 512MB
============================================

At the end of calibration, after a few minutes it is reported:

Success: DDR calibration completed!!!

Although some lines up I have discovered this information:

Note: Array result[] holds the DRAM test result of each byte.
      0: test pass. 1: test fail
      4 bits respresent the result of 1 byte.
      result 01:byte 0 fail.
      result 11:byte 0, 1 fail.
Starting Read calibration..

My first problem is I do not really get if this is a problem or not.

Second, after the calibration my Stress test doesn't work.When I run the Stress test I get the folowing result:

============================================
        DDR configuration
BOOT_CFG3[5-4]: 0x00, Single DDR channel.
DDR type is DDR3
Data width: 16, bank num: 8
Row size: 15, col size: 10
Chip select CSD0 is used
Density per chip select: 512MB
============================================

DDR Stress Test Iteration 1
Current Temperature: 48
============================================
DDR Freq: 528 MHz
t0.1: data is addr test
t0: memcpy11 SSN test
Address of bank1 failure: 0x16ecaf40
Data initally read was:   0xaf40
Data re-read is:          0xaf40
But pattern was:          0xffff
Error: failed to run stress test!!!

The design has already been proven, and it worked with Solo processor instead the QuadPlus. I can also provide init script if needed. I hope it is only some problem with the script.

Many thanks in advance if somebody could help me running stress test.

Re: QuadPlus DDR3 calibration/Test problem

nexy_sm — Fri, 24 Feb 2017 10:54:42 GMT

HI all,

so after some investigating and testing, it happens that stress test is some tie successful and mostly unsuccessful. Is there any chance that successful result is happening only by accident?

Cheers!

Re: QuadPlus DDR3 calibration/Test problem

nexy_sm — Fri, 24 Feb 2017 14:19:38 GMT

Hello again,

so, it looks like changing boot_cfg(5:3) to 11 and using extend mode value of 00 which means NoC disabled and MMDC reordering enabled. Could anybody confirm why this solved the problem?

Best

Re: QuadPlus DDR3 calibration/Test problem

Yuri — Tue, 28 Feb 2017 04:55:58 GMT

Hello,

You may look at sections 3.3.1 (Identifying Issue on Calibrations) and

3.3.2 (Identifying Issue on Stress Test) of the following document.

Freescale i.MX6 DRAM Port Application Guide-DDR3

Please check Your PCB design using Chapter 3 (i.MX 6 Series Layout
Recommendations) of the Hardware Development Guide

http://cache.nxp.com/assets/documents/data/en/user-guides/IMX6DQ6SDLHDG.pdf

In particular, please use Excel page named “MX6 DRAM Bus Length Check” in “HW Design

Checking List for i.Mx6”, linked below.

https://community.nxp.com/docs/DOC-93819

You may try the following tool.

MX6DQP DDR3 Script Aid

Also, for more scripts, please create request

How to submit a new question for NXP Support

Regards,

Yuri.