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    <title>i.MX ProcessorsのトピックiMX6UL USB over current</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6UL-USB-over-current/m-p/662015#M101642</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Using the iMX6UL as a USB host controller, with an external power switch with over current status.&lt;/P&gt;&lt;P&gt;If I wire the OC status to a iMX6UL OC pin (as described in table 54-1 of the iMX6UL Reference Manual). Will there be any HW dependencies when a OC situation occurs:&lt;/P&gt;&lt;P&gt;1: Activating the OC input, will the USB data transfer be interrupted?&lt;/P&gt;&lt;P&gt;2: Will the OC input by any means directly control the PWR output?&lt;/P&gt;&lt;P&gt;I am thinking of any HW links between functions of the USB block.&lt;/P&gt;&lt;P&gt;A lot of reference designs are using any other GPIO pin for OC status, which I assume requires the USB driver to be adapted to that. But as the Reference Manual lists a number of dedicated pins for OC status, I'm wondering if the on-chip HW has any functionality for handling OC situations.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 15 Nov 2016 09:23:43 GMT</pubDate>
    <dc:creator>hansjpetersen</dc:creator>
    <dc:date>2016-11-15T09:23:43Z</dc:date>
    <item>
      <title>iMX6UL USB over current</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6UL-USB-over-current/m-p/662015#M101642</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Using the iMX6UL as a USB host controller, with an external power switch with over current status.&lt;/P&gt;&lt;P&gt;If I wire the OC status to a iMX6UL OC pin (as described in table 54-1 of the iMX6UL Reference Manual). Will there be any HW dependencies when a OC situation occurs:&lt;/P&gt;&lt;P&gt;1: Activating the OC input, will the USB data transfer be interrupted?&lt;/P&gt;&lt;P&gt;2: Will the OC input by any means directly control the PWR output?&lt;/P&gt;&lt;P&gt;I am thinking of any HW links between functions of the USB block.&lt;/P&gt;&lt;P&gt;A lot of reference designs are using any other GPIO pin for OC status, which I assume requires the USB driver to be adapted to that. But as the Reference Manual lists a number of dedicated pins for OC status, I'm wondering if the on-chip HW has any functionality for handling OC situations.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Nov 2016 09:23:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6UL-USB-over-current/m-p/662015#M101642</guid>
      <dc:creator>hansjpetersen</dc:creator>
      <dc:date>2016-11-15T09:23:43Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6UL USB over current</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6UL-USB-over-current/m-p/662016#M101643</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Hans,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is no hardware dependency that I'm aware of, this is all software controlled, behaviour is programmable to a certain extent, an interrupt can be generated when an OC is detected, what happens next is software controlled.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Refer to the RM Port Reporting Over-Current section for more details, if searching through the RM USB chapters, use "current" as the search term to help avoid missing any OC associated information.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Ross&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Nov 2016 11:49:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6UL-USB-over-current/m-p/662016#M101643</guid>
      <dc:creator>RossMcLuckie</dc:creator>
      <dc:date>2016-11-15T11:49:18Z</dc:date>
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