topic Re: iMX25 UART: TX bit errors on linux-2.6.3 in i.MX Processors

iMX25 UART: TX bit errors on linux-2.6.3

Hydrix — Thu, 08 Dec 2011 23:41:34 GMT

Hi all,

I'm sorry that my question is rather vague. I'm still trying to get a handle on the problem that I'm facing.

I've noticed bit errors on the TX line on UARTs 2 and 3 on a iMX25 based board. The UARTs are connected to an RS422 bus (Full duplex RS485).

The problem manifests on a very specific scenario outlined below:

I'm using a PC with a USB to RS485/422 converter, and the i.MX25 based linux box which I'll call DEVICE.

Test:

The PC transmits and receives a ~32K file (send_file.bin and recv_file.bin):

The DEVICE loops back the received file and makes a local copy:

stty -F /dev/ttymxc2 raw -tostop speed 9600 -echo -parenb
cat /dev/ttymxc2 | tee file > /dev/ttymxc2

send_file.bin in the PC and file in linux are identical which indicates that transmission from the PC are OK. But the data in send_file.bin and recv_file.bin have bit errors: 1-2 bits on some of the bytes are randomly flipped (1->0 and 0->1).

Test 2:

The PC only receives the file with linux transmitting it.

This time there were no errors in the file. In other words, it looks like the problem occurs when the DEVICE is receiving and transmitting at the same time.

Other info:

I've verified the USB to RS4xx converter by looping back the wires.

Electrically, the signals on the RS485 bus look clean (no noise or slew problems).

The issues occurs at both 115200 and 9600bps.

Has anyone else encountered anything like this? Any suggestions on how to tackle this beast?

Thanks,

Re: iMX25 UART: TX bit errors on linux-2.6.3

Hydrix — Thu, 08 Dec 2011 23:42:01 GMT

Oops. sorry make that linux-2.6.31

Re: iMX25 UART: TX bit errors on linux-2.6.3

MehmetAliIpin — Fri, 09 Dec 2011 07:23:21 GMT

Dear Hydrix,

This type of errors may always be happen, beacause of the noise, non linear behavior of electrical components, power supply glitches, lighting, instant electromagnetic fields etc.

The only way to solve it, is to implement a ISO-OSI layer 2 over the physical layer, like in internet communication. Simply In layer 2, you add a CRC and a sequence number at the end of your data blocks( in your case, you may divide your 32 KByte data let us say 1 KByte blocks), the receiver side checks the sequence number and CRC values. If it finds an error in the block, it requests the sender to re-transmit the sequence numbered block again.

Regards.