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    <title>i.MX ProcessorsのトピックRe: VPU Decoding core clock setting in i.MX515</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659203#M101137</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Actually, i.MX51 is quite obsolete part, so, I don't think that someone will ever revise its documentation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Artur&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 24 Nov 2016 08:50:14 GMT</pubDate>
    <dc:creator>art</dc:creator>
    <dc:date>2016-11-24T08:50:14Z</dc:date>
    <item>
      <title>VPU Decoding core clock setting in i.MX515</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659199#M101133</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I plan to use VPU of i.MX515.&lt;/P&gt;&lt;P&gt;So I read &lt;A href="http://www.nxp.com/files/dsp/doc/ref_manual/MCIMX51RM.pdf?fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf"&gt;MCIMX51RM Rev. 1 2/2010&lt;/A&gt;&amp;nbsp;but&amp;nbsp;&lt;SPAN&gt;I can't find how to set a d&lt;/SPAN&gt;&lt;SPAN&gt;ecoding core clock domain (cclk).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I know the &lt;SPAN&gt;d&lt;/SPAN&gt;&lt;SPAN&gt;ecoding core clock comes from the CCM module&lt;/SPAN&gt;&amp;nbsp;because I found the following description in section&amp;nbsp;61.2.1.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black; font-size: 15px;"&gt;&lt;EM&gt;All VPU input clock and reset sources come from the i.MX51 CCM module. The VPU does not do clock gating internally.&lt;/EM&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;However, I can't understand which register do I set.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;Q1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;Could you specify which register do I set to use VPU ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;Q2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;According to the section 61.4.2 of RM, the decoding core clock domain's frequency can scale done through the VPU API.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;I can't find the API in&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: black;"&gt;L2.6.35_10.11.01_ER_docs/doc/mx5/i.MX5x_Linux_VPU_API.pdf.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;&lt;SPAN&gt;Which VPU API can set the&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;core clock frequency ?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black;"&gt;&lt;SPAN&gt;Ko-hey&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Nov 2016 04:30:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659199#M101133</guid>
      <dc:creator>ko-hey</dc:creator>
      <dc:date>2016-11-15T04:30:54Z</dc:date>
    </item>
    <item>
      <title>Re: VPU Decoding core clock setting in i.MX515</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659200#M101134</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Could someone follow and answer the following question ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;I checked &lt;A href="http://www.nxp.com/assets/documents/data/en/reference-manuals/MCIMX51RM.pdf?&amp;amp;fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf"&gt;MCIMX51RM Rev. 1 2/2010&lt;/A&gt; onemore time and found the CCGR5 Register can enable the VPU clock.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;CG3 field can enable "vpu clocks" and CG4 field can enable "vpu reference clock".&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;On the other hand, according to the Figure 7-41 and Figure 7-44 of RM, the clock relate to VPU is as follow.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;VPU_AXI_CLK_ROOT&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;VPU_RCLK_ROOT&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;Q1-1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;VPU_AXI_CLK_ROOT will be enable when user set CG3 field to "11".&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;Am I correct ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;Q1-2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;VPU_RCLK_ROOT will be enable when user set CG4 field to "11".&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;Am I correct ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: 15px; font-family: arial,helvetica,sans-serif;"&gt;Q2&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="font-size: 15px;"&gt;According to the section 61.4.2 of RM, the decoding core clock domain's frequency can scale done through the VPU API.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 15px;"&gt;&lt;SPAN style="color: black;"&gt;I can't find the API in&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: black;"&gt;L2.6.35_10.11.01_ER_docs/doc/mx5/i.MX5x_Linux_VPU_API.pdf.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="padding: 0px; min-height: 8pt;"&gt;&lt;SPAN style="font-size: 15px;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: black; font-size: 15px;"&gt;Which VPU API can set the&amp;nbsp;core clock frequency ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0mm 0mm 0pt;"&gt;&lt;SPAN style="color: #000000; font-size: small; font-family: ＭＳ ゴシック;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ko-hey&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 Nov 2016 01:25:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659200#M101134</guid>
      <dc:creator>ko-hey</dc:creator>
      <dc:date>2016-11-18T01:25:56Z</dc:date>
    </item>
    <item>
      <title>Re: VPU Decoding core clock setting in i.MX515</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659201#M101135</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Q. VPU_AXI_CLK_ROOT will be enable when user set CG3 field to "11". Am I correct ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A. Yes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Q. VPU_RCLK_ROOT will be enable when user set CG4 field to "11". Am I correct ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A. Yes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Q. Which VPU API can set the core clock frequency ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A. Actually, there is some inaccuracy in the manual. In fact, the decoding clock is derived from the AXI clock and has the equal frequency (typically, 166MHz). There is no separate mechanism to change the decoding clock frequency.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Artur&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 23 Nov 2016 11:34:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659201#M101135</guid>
      <dc:creator>art</dc:creator>
      <dc:date>2016-11-23T11:34:57Z</dc:date>
    </item>
    <item>
      <title>Re: VPU Decoding core clock setting in i.MX515</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659202#M101136</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size:10.0pt;mso-bidi-font-size:11.0pt;mso-ascii-font-family:Arial;mso-fareast-font-family: MS Gothic ;mso-hansi-font-family:Arial;color:black;"&gt;So would you revise the manual ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size:10.0pt;mso-bidi-font-size:11.0pt;mso-ascii-font-family:Arial;mso-fareast-font-family: MS Gothic ;mso-hansi-font-family:Arial;color:black;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size:10.0pt;mso-bidi-font-size:11.0pt;mso-ascii-font-family:Arial;mso-fareast-font-family: MS Gothic ;mso-hansi-font-family:Arial;color:black;"&gt;Ko-hey&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 23 Nov 2016 23:45:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659202#M101136</guid>
      <dc:creator>ko-hey</dc:creator>
      <dc:date>2016-11-23T23:45:46Z</dc:date>
    </item>
    <item>
      <title>Re: VPU Decoding core clock setting in i.MX515</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659203#M101137</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Actually, i.MX51 is quite obsolete part, so, I don't think that someone will ever revise its documentation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Artur&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 24 Nov 2016 08:50:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659203#M101137</guid>
      <dc:creator>art</dc:creator>
      <dc:date>2016-11-24T08:50:14Z</dc:date>
    </item>
    <item>
      <title>Re: VPU Decoding core clock setting in i.MX515</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659204#M101138</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size:10.0pt;mso-bidi-font-size:11.0pt;mso-ascii-font-family:Arial;mso-fareast-font-family: MS Gothic ;mso-hansi-font-family:Arial;color:black;"&gt;Okay, thanks.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size:10.0pt;mso-bidi-font-size:11.0pt;mso-ascii-font-family:Arial;mso-fareast-font-family: MS Gothic ;mso-hansi-font-family:Arial;color:black;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size:10.0pt;mso-bidi-font-size:11.0pt;mso-ascii-font-family:Arial;mso-fareast-font-family: MS Gothic ;mso-hansi-font-family:Arial;color:black;"&gt;Ko-hey&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size:10.0pt;mso-bidi-font-size:11.0pt;mso-ascii-font-family:Arial;mso-fareast-font-family: MS Gothic ;mso-hansi-font-family:Arial;color:black;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 24 Nov 2016 08:51:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VPU-Decoding-core-clock-setting-in-i-MX515/m-p/659204#M101138</guid>
      <dc:creator>ko-hey</dc:creator>
      <dc:date>2016-11-24T08:51:35Z</dc:date>
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