i.MX ProcessorsのトピックRe: about adv7181 display on screen

about adv7181 display on screen

rothwanhuang — Tue, 27 Sep 2016 09:24:49 GMT

Hi, i have same question about adv7181display on screen,

1 . Now I use Yocto project "imx6q_L3_14_52" & "fsl-releases-bsp";

2. CVBS signal through adv7181converts to bt656,and V4l2 capture image and display on LCD;

The quetsion is the display and capture iimage have some Horizontal stripes，for examples please look the attachment,and how about to slove it ? thanks!

Re: about adv7181 display on screen

igorpadykov — Tue, 27 Sep 2016 10:24:58 GMT

Hi rothwan

for bt656 camera format mxc_v4l2_tvin.c should be used,

not V4l2 capture, please test with imx-test/test/mxc_v4l2_test

www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-test-5.3.tar.gz

Also stripes may be caused by resizing, please check

i.MX6 GStreamer-imx Plugins - Tutorial & Example Pipelines

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

Re: about adv7181 display on screen

rothwanhuang — Tue, 27 Sep 2016 10:52:49 GMT

Yes,the picture is from ./mxc_v4l2_tvin.out -ow 720 -oh 625 -ol 10 -ot 20 -f UYVY, and the motiom level is High, the problem is still have.

Best regards.

Re: about adv7181 display on screen

rothwanhuang — Tue, 27 Sep 2016 11:19:29 GMT

Some people think that is the conversion, the singal of CVBS is interleave，and the signal from adv7181 is the interleave,but imx6q the display is progressive，If this problem causes, how to solve?

Re: about adv7181 display on screen

igorpadykov — Tue, 27 Sep 2016 23:42:15 GMT

please check
https://community.freescale.com/message/314760#314760

Re: about adv7181 display on screen

rothwanhuang — Wed, 28 Sep 2016 01:56:06 GMT

Yes, i have check it , and For adv7181, I have try the followed settting:

p->if_type = V4L2_IF_TYPE_BT656;

p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT;

p->u.bt656.nobt_hs_inv = 0;

p->u.bt656.bt_sync_correct = 0; // Use internal VSYNC mode, CSI_VSYNC and CSI_HSYNC pins are not needed.

p->u.bt656.clock_curr = 0; //BT656 interlace clock mode

adv7181 I2C register setting for CVBS input:

adv7180_write_reg(0x00,0x00);

adv7180_write_reg(0x03,0x0c);

adv7180_write_reg(0x04,0x77);

adv7180_write_reg(0x17,0x41);

adv7180_write_reg(0x1d,0x47);

adv7180_write_reg(0x31,0x02);

adv7180_write_reg(0x3a,0x17);

adv7180_write_reg(0x3b,0x81);

adv7180_write_reg(0x3d,0xa2);

adv7180_write_reg(0x3e,0x6a);

adv7180_write_reg(0x3f,0xa0);

adv7180_write_reg(0x86,0x0b);

adv7180_write_reg(0xf3,0x01);

adv7180_write_reg(0xf9,0x03);

adv7180_write_reg(0x0e,0x80);

adv7180_write_reg(0x52,0x46);

adv7180_write_reg(0x54,0x00);

adv7180_write_reg(0x7f,0xff);

adv7180_write_reg(0x81,0x30);

adv7180_write_reg(0x90,0xc9);

adv7180_write_reg(0x91,0x40);

adv7180_write_reg(0x92,0x3c);

adv7180_write_reg(0x93,0xca);

adv7180_write_reg(0x94,0xd5);

adv7180_write_reg(0xb1,0xff);

adv7180_write_reg(0xb6,0x08);

adv7180_write_reg(0xc0,0x9a);

adv7180_write_reg(0xcf,0x50);

adv7180_write_reg(0xd0,0x4e);

adv7180_write_reg(0xd1,0xb9);

adv7180_write_reg(0xd6,0xdd);

adv7180_write_reg(0xd7,0xe2);

adv7180_write_reg(0xe5,0x51);

adv7180_write_reg(0xf6,0x3b);

adv7180_write_reg(0x0e,0x00);

but this problem is still ,Why?