IMX8QM DPU

JoRadio — Wed, 14 Jan 2026 06:23:16 GMT

In the DPU driver, there is the following code in kernel/kernel-source/drivers/gpu/drm/imx/dpu/dpu-plane.c:944

static const struct drm_plane_helper_funcs dpu_plane_helper_funcs = { .prepare_fb = drm_gem_fb_prepare_fb, .atomic_check = dpu_plane_atomic_check, .atomic_update = dpu_plane_atomic_update, // no .atomic_async_check // no .atomic_async_update };

Up to the latest imx-linux code repository, I found that .atomic_async_check and .atomic_async_update are still missing in the code, which causes all drm-plane commits to always be synchronous. As a result, in user space, after Weston starts, all drm-planes except the primary-plane cannot be used. Does NXP officially provide patches implementing .atomic_async_check and .atomic_async_update? If these two functions cannot be implemented due to hardware limitations, please let me know.

Re: IMX8QM DPU

Zhiming_Liu — Fri, 16 Jan 2026 07:36:12 GMT

Hi @JoRadio

The DPU doesn't support such feature.

atomic_async_update An async update will happen on legacy cursor updates. Drivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means “not vblank synchronized”.

Best Regards,
Zhiming

topic Re: IMX8QM DPU in i.MX Graphics

IMX8QM DPU

Re: IMX8QM DPU