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    <title>topic Re: Getting problem while configuring PLL and using QSCI module  in Digital Signal Controllers</title>
    <link>https://community.nxp.com/t5/Digital-Signal-Controllers/Getting-problem-while-configuring-PLL-and-using-QSCI-module/m-p/657029#M979</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Shreeram,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regarding your question, I think you can develop the code based on PE, the PE can generate the code to use internal 8MHz clock and use PLL to multiply the clock to 60MHz.&lt;/P&gt;&lt;P&gt;Hope it can help you&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;Xiangjun Rong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 05 May 2017 09:01:12 GMT</pubDate>
    <dc:creator>xiangjun_rong</dc:creator>
    <dc:date>2017-05-05T09:01:12Z</dc:date>
    <item>
      <title>Getting problem while configuring PLL and using QSCI module</title>
      <link>https://community.nxp.com/t5/Digital-Signal-Controllers/Getting-problem-while-configuring-PLL-and-using-QSCI-module/m-p/657028#M978</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am using MC56F82313vlc IC. I wanted to used QSCI0 module with a 9600 as its baud rate.Configure PLL to max frequency i.e OCCS_DIVBY = 0x2071 with default trimming factor i.e 0x220 and using ROSC8M as internal 8MHZ reference clock. I am not getting stable output frequency and also when I try to change trim frequency using SIM_NVMOPT2H i get default value only which is 0x222. So kindly help me to get a stable PLL output. If any one have sample code related to this IC please send me. So that I can get some idea to solve my problem. &lt;BR /&gt;Thank you in Advance&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;BR /&gt;Shreeram Muley&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 May 2017 07:13:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Digital-Signal-Controllers/Getting-problem-while-configuring-PLL-and-using-QSCI-module/m-p/657028#M978</guid>
      <dc:creator>shreerammuley</dc:creator>
      <dc:date>2017-05-02T07:13:47Z</dc:date>
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    <item>
      <title>Re: Getting problem while configuring PLL and using QSCI module</title>
      <link>https://community.nxp.com/t5/Digital-Signal-Controllers/Getting-problem-while-configuring-PLL-and-using-QSCI-module/m-p/657029#M979</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Shreeram,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regarding your question, I think you can develop the code based on PE, the PE can generate the code to use internal 8MHz clock and use PLL to multiply the clock to 60MHz.&lt;/P&gt;&lt;P&gt;Hope it can help you&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;Xiangjun Rong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 May 2017 09:01:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Digital-Signal-Controllers/Getting-problem-while-configuring-PLL-and-using-QSCI-module/m-p/657029#M979</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2017-05-05T09:01:12Z</dc:date>
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