topic Re: PE ADC "High" Level Component Problem for 56F827xx in Digital Signal Controllers

PE ADC "High" Level Component Problem for 56F827xx

dynapb — Mon, 13 Feb 2017 21:28:21 GMT

Hi All

I am setting up a PE ADC High level component and am having a problem with the Internal Trigger, Trigger Input settings. This is for a 56F82748 DSC and using the 12 Bit Cyclic ADC.

I get the following error in the ADC Component setttings.

and in the Problems it shows the following Errors.

The strange thing is that the ADC_LDD driver that the ADC High level component is using is happy

and it is set to the same TA0_OUT as shown below (set automatically from the ADConv component).

The error message seems to indicate that the XBARA is not set up properly. So I added that component and the "Automatic" settings show that the timer I want to use is routed to the ADC.

Also the Pin Settings component shows the ADCA Trigger Input connected to TA0_OUT.

To me this seems like a bug but maybe I missed something.

The only other thing I see that may be a clue is the errors showing up -

"ERROR: Internal signal "TA0_OUT" is selected. Device "TMR0_CNTR" of linked bean "TMR0_pwm" is not interconnected with device "ADC"!"

and "Routing peripheral is not selected/specified (Trigger input)"

- but not sure why it is saying that since they seem to be connected through the XBARA.

Thanks for your Help! (I tried on the PE Community but no responses)

Pete

Re: PE ADC "High" Level Component Problem for 56F827xx

xiangjun_rong — Fri, 17 Feb 2017 07:19:51 GMT

Hi,

I have tried to configure the ADC bean which simulate your PE setting, it seems that I have not problem:

Can you try to remove the other quadTimer beans and only keep one TA0 quadTimer bean and have a try?

It seems that the PE version is different for my CW for mcu tools.

Xiangjun Rong

Re: PE ADC "High" Level Component Problem for 56F827xx

dynapb — Fri, 17 Feb 2017 17:43:51 GMT

Hi Xiangjun

Thanks for the reply. You set up a Logical Device Driver (LDD). The problem occurs when the component is a High Level driver that uses the LDD (I want to use that one because it can do multiple samples and averaging). This image shows what driver I am using. Can you select that one and see what the results are?

When that component is set to the Internal Trigger Input that is when it cannot resolve the setting.

Is there any documentation that shows what "Routing peripheral is not selected/specified" is refering to in PE?

Also I did set up a separate project with just the ADC High level component and had the same problem. If I disable the Internal Trigger then it is happy again but I want to trigger it off a timer.

Thanks,

Pete

Re: PE ADC "High" Level Component Problem for 56F827xx

dynapb — Mon, 27 Feb 2017 16:41:32 GMT

All

Just to let everyone know the status of this bug. The following is correspondence.

Dear Peter Becher,

I think it is the PE bug for MC56F82xxx, as a workaround, I think you can write register directly so that the PIT or quadTimer can trigger ADC. for example, if you want to use TA0 to trigger ADC: XBARA_SEL6=14; initailize the TA0 module so that it can generate the signal at the sample cycle time.

Thank you for your interest in NXP Semiconductor products and

for the opportunity to serve you.

Best regards,

Xiangjun

Technical Support

NXP Semiconductor

Hi Xiangjun,

Do you submit bugs to PE so they can be fixed or is there a way that I can submit them?

It would be nice to get it fixed in future releases.

Thanks,

Pete

Hi, Pete,

I will submit a bug report to PE team, thank you for your understanding.

Xiangjun Rong