How to understand I/O status for 56F827XX at reset

daweiyou — Tue, 21 Aug 2018 15:38:09 GMT

Hi:

here are several questions about datasheet

1.From latest DS for 56F827XX, <MC56F827XXDS>, there are some descriptions for I/O during reset.

<Rev. 4, 07/2018> vs <Rev. 3.0, 09/2016 > , update IO status from "input, internal pull-up" to "input" for most GPIO, whether which means the input is tri-state(high impedance)?

2.this adjustment is for new silicon or all old products??

3.I noticed other old 56f825X datasheet also indicate internal-pull up, seems which is a classic design, why this pull-up cancelled?

4.How about warm reset(watchdog, SW reset), how these warm reset influence GPIO status during reset?

Re: How to understand I/O status for 56F827XX at reset

dynapb — Thu, 23 Aug 2018 15:17:43 GMT

Hi Dawei You,

I use the 82746 and it comes up in HiZ state at power on.

I was surprised at that since other DSC's I've used come up in Input state with Pullups (normal).

Not sure what happens after other reset sources but would imagine it is the same.

So if you require a certain state you need to add external pullups.

Pete

topic How to understand I/O status for 56F827XX at reset in Digital Signal Controllers

How to understand I/O status for 56F827XX at reset

Re: How to understand I/O status for 56F827XX at reset