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FMPLL configuration for MPC5644A

chandrasekarkri — Mon, 08 Feb 2016 12:31:25 GMT

pls help anyone how to configure fmpll in mpc5644a by Fref =40 MHZ for Fsys=120MHZ
i configured but it not working in EVT board ..my configuration is
void FMPLL_config()
{
ECSM.MUDCR.R = 0x40000000; /* 1 SRAM waitstate for fsys above 98MHz */
FMPLL.ESYNCR2.R = 0x00000002;
FMPLL.ESYNCR1.R = 0xF0020024;
while (FMPLL.SYNSR.B.LOCK != 1) {}; /* Wait for FMPLL to LOCK */
FMPLL.ESYNCR2.R = 0x00000001; /* Fsys =120Mhz */
SIU.ECCR.R = 0x00001003; /* CLKOUT to /4 because of 66MHz limit */

}

Re: FMPLL configuration for MPC5644A

martin_kovar — Mon, 08 Feb 2016 12:58:30 GMT

Hi,

try this configuration:

/* Set sysclk = 120MHz running from PLL with 40 MHz crystal reference. */

void initSysclk (void) {

FMPLL.ESYNCR1.B.CLKCFG = 0X7; /* Change clk to PLL normal mode from crystal */

FMPLL.SYNCR.R = 0x22880000; /* Fsys =60Mhz */

while (FMPLL.SYNSR.B.LOCK != 1) {}; /* Wait for FMPLL to LOCK */

FMPLL.SYNCR.R = 0x22800000; /* Fsys =120Mhz */

}

Regards,

Martin

Re: FMPLL configuration for MPC5644A

chandrasekarkri — Tue, 09 Feb 2016 04:58:55 GMT

Hi Martin Kovar,

I tested your code in my XPC564A 324BGA MINIMODULE BOARD(MPC5644A), but board is not responding..do you have any suggestions for this..

Regards,

Chandrasekar K