<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic How do I configure the initialization TCL file for NOR flash boot mode on the T2081 processor? in CodeWarrior Development Tools</title>
    <link>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1958964#M9175</link>
    <description>&lt;P&gt;In JTAG mode, we provide the configuration TCL file in the debug setup. During debugging, it connects to the board, enters the DDR, and starts executing the application.&lt;/P&gt;&lt;P&gt;In NOR Flash boot mode, who instructs the processor to start from the NOR Flash address location (0xE8000000)?&lt;/P&gt;&lt;P&gt;Can you tell me ,How the initialization TCL file (T2081QDS_init_core.tcl) configured in the NOR flash boot mode on the T2081 processor?&lt;/P&gt;</description>
    <pubDate>Fri, 20 Sep 2024 17:35:10 GMT</pubDate>
    <dc:creator>Vimalprasad</dc:creator>
    <dc:date>2024-09-20T17:35:10Z</dc:date>
    <item>
      <title>How do I configure the initialization TCL file for NOR flash boot mode on the T2081 processor?</title>
      <link>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1958964#M9175</link>
      <description>&lt;P&gt;In JTAG mode, we provide the configuration TCL file in the debug setup. During debugging, it connects to the board, enters the DDR, and starts executing the application.&lt;/P&gt;&lt;P&gt;In NOR Flash boot mode, who instructs the processor to start from the NOR Flash address location (0xE8000000)?&lt;/P&gt;&lt;P&gt;Can you tell me ,How the initialization TCL file (T2081QDS_init_core.tcl) configured in the NOR flash boot mode on the T2081 processor?&lt;/P&gt;</description>
      <pubDate>Fri, 20 Sep 2024 17:35:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1958964#M9175</guid>
      <dc:creator>Vimalprasad</dc:creator>
      <dc:date>2024-09-20T17:35:10Z</dc:date>
    </item>
    <item>
      <title>Re: How do I configure the initialization TCL file for NOR flash boot mode on the T2081 processor?</title>
      <link>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1961595#M9181</link>
      <description>&lt;P&gt;For PowerPC processor, each core begins execution with the instruction at effective address&lt;BR /&gt;0x0_FFFF_FFFC, it maps to the end of IFC NOR flash by hardware.&lt;/P&gt;
&lt;P&gt;In CodeWarrior project, please configure the project as "ROM" version, then rebuild this project.&lt;/P&gt;
&lt;P&gt;The following is ROM version LCF file configuration.&lt;/P&gt;
&lt;DIV&gt;MEMORY {&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt; ram&amp;nbsp; &amp;nbsp; : org = 0x00002000, l = 0x7FFFFFFF&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt; rom&amp;nbsp; &amp;nbsp;: org = 0xEFF10000, l = 0x000EEFFF&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;}&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;SECTIONS&lt;/DIV&gt;
&lt;DIV&gt;{&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; _stack_addr = 0x003dfff0;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; _stack_end&amp;nbsp; = 0x003d7ff0;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; _heap_addr&amp;nbsp; = 0x3cfff0;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; _heap_end&amp;nbsp; &amp;nbsp;= 0x3d7ff0;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; .intvec 0xEFF00000 :&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; {&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; &amp;nbsp; *(.intvec)&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; } = 0xffff&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; .reset 0xEFFFFFFC :&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; {&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; &amp;nbsp; *(.reset)&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; } = 0x4&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; .init 0xEFFFF000 :&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; {&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; &amp;nbsp; *(.init)&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; &amp;nbsp; *(.init_data)&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp; } = 0xFFC&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Wed, 25 Sep 2024 09:10:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1961595#M9181</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2024-09-25T09:10:54Z</dc:date>
    </item>
    <item>
      <title>Re: How do I configure the initialization TCL file for NOR flash boot mode on the T2081 processor?</title>
      <link>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1961619#M9182</link>
      <description>&lt;P&gt;Thanks for your reply,&lt;/P&gt;&lt;P&gt;While configuring the project as ROM version, in the source folder where two files which are T2081QDS_init.c and the T2081QDS_init.h.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any changes need to be made in these files or no?&lt;/P&gt;&lt;P&gt;I'm using my NOR flash address from 0xE0000000 to 0xE7FFFFFF(128MB).&lt;/P&gt;&lt;P&gt;Can you please tell me what are the things have to done for creating the test image and where I have to load the test image?&lt;/P&gt;</description>
      <pubDate>Wed, 25 Sep 2024 09:26:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1961619#M9182</guid>
      <dc:creator>Vimalprasad</dc:creator>
      <dc:date>2024-09-25T09:26:51Z</dc:date>
    </item>
    <item>
      <title>Re: How do I configure the initialization TCL file for NOR flash boot mode on the T2081 processor?</title>
      <link>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1963081#M9183</link>
      <description>&lt;P&gt;No need to modify the NOR flash memory map in&amp;nbsp;&lt;SPAN&gt;2081QDS_init.c.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;You need to configure NOR flash from 0xE8000000 to 0xEFFFFFFF.&lt;/P&gt;</description>
      <pubDate>Fri, 27 Sep 2024 01:54:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/CodeWarrior-Development-Tools/How-do-I-configure-the-initialization-TCL-file-for-NOR-flash/m-p/1963081#M9183</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2024-09-27T01:54:02Z</dc:date>
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  </channel>
</rss>

