CodeWarrior Development ToolsのトピックRe: Setting I/O pin on Kinetis from debugger script

Setting I/O pin on Kinetis from debugger script

scottm — Wed, 28 Dec 2016 02:47:06 GMT

I've got a K22F-based board that needs to have a couple of GPIO pins initialized to appropriate values before startup - there's a transmitter connected that shouldn't be left running during the flash load process. It looks like I ought to be able to do this with mem commands (or possibly reg commands) from the init_kinetis.tcl script, but I'm not having any luck getting it to work.

I'm able to set the SCGC5 register without an error, but any port control registers I try to access give me an error. I'm guessing it's just a matter of setting up a missing clock setting or something, but it's late and I'm tired of trying to hunt it down. Does anyone have a working example of a debugger script for the K22 that just sets an I/O pin?

Thanks,

Scott

Re: Setting I/O pin on Kinetis from debugger script

Alice_Yang — Thu, 29 Dec 2016 02:49:30 GMT

Hello SOTT,

Which pin do you want to configure ?Please send your project or the init_kinetis.tcl file to me ,

i will help you to check and test it on my side .

And could you please tell me why do you want configureit before startup ?

Thanks!

Alice

Re: Setting I/O pin on Kinetis from debugger script

scottm — Thu, 29 Dec 2016 03:48:36 GMT

Hi Alice,

I need to set PTA4 on pin 26 low. The pin controls an external transmitter, and for some reason it's either high or floating during flash programming, which causes the transmitter to activate. If I hit F11 and walk away either the transmitter or the dummy load it's connected to could eventually overheat. PTA5 also controls a transmitter but it seems to come up in a safe state. Mostly it's just a nuisance.

Here's what I was trying in the init_kinetis.tcl file:

proc set_pins {} {
# Clear PTT
# Set SCGC5
mem 40048038 = 40382
#SIM_SCGC7
mem 40048040 = 6
#MPU_CEST
mem 4000d000 = 815100
#AXBS_PRS0
mem 40004000 = 430210
#AXBS_PRS1
mem 40004100 = 430210
#AXBS_PRS2
mem 40004200 = 430210
#AXBS_PRS3
mem 40004300 = 430210
#AXBS_PRS4
mem 40004400 = 430210
# Set PORTA_PCR4
mem 40049010 = 143
# Set GPIOA_PDDR
mem 400ff014 = 10
# Set GPIOA_PDOR
mem 400ff000 = 0
}

I started with SCGC5 and PORTA and then started adding in the other registers as I found them in the startup code. I don't want to assume that I'm setting the wrong registers until I know that the mem command actually works and gets me the result I want.

Thanks,

Scott

Re: Setting I/O pin on Kinetis from debugger script

Alice_Yang — Thu, 29 Dec 2016 07:41:47 GMT

Hello SCOTT,

Have you configure the pin PTA4 to GPIO function on the register of

PORTA_PCR4-> MUX

About the k22 , i only have FRDM-K22, while the CW doesn't support it , so i test on FRDM-K64 board,

while it is the same .

I set the PTE26 to low , i write the below codes in the file of init_kinetis.tcl:

reg SIM_SCGC5 = 0X2000
reg GPIOE_PDDR = 0X04000000
reg GPIOE_PDOR = 0x00000000
reg PORTE_PCR26 = 0X0100

Please refer to this configure your pin.

Hope it helps

Have a great day,
Alice Yang

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Re: Setting I/O pin on Kinetis from debugger script

scottm — Thu, 29 Dec 2016 20:34:36 GMT

I'm most of the way there. Here's what I'm using now in init_kinetis.tcl:

reg SIM_SCGC5 = 0X00040382
reg GPIOA_PDDR = 0X00000030
reg GPIOA_PDOR = 0x00000000
reg PORTA_PCR4 = 0X00000100
reg PORTA_PCR5 = 0X00000100

This sets both PTA4 and PTA5 low. I'd swear I tried it exactly that way before but maybe I had a typo. In any case, this does set the pins properly before the download starts, but then the P&E Cyclone seems to be resetting it so it turns on again. I added the same tcl code above to a separate .tcl file and set up a task in the debugger's 'Execute Tasks' pane. That clears the pins again. It has to do a second flash load after that and the pins stay cleared for the duration.

It might be possible for me to disable the 'perform standard download' and replace it with equivalent tasks so I can control the order of execution, but I'm already talking to P&E about an issue today so I'll check with them before I do anything else. At least this gets me to a point where I can hit F11 and take a coffee break without worrying about a transmitter overheating while I'm gone.

Thanks,

Scott

Re: Setting I/O pin on Kinetis from debugger script

Alice_Yang — Fri, 30 Dec 2016 04:02:01 GMT

Hello SCOTT,

Thanks for your sharing.

I have a question about "before the download starts, but then the P&E Cyclone seems to be resetting it so it turns on again.",

what do you meaning about this , you said dowload starts , if do load download project , how to set I/O ?

In fact , i want to know after doing what , you checked the P&E resetting the pins to turns on.

And whether in your project you configure the pins ,while you ignore .

Hoping you share your result to us , thanks!

Alice

Re: Setting I/O pin on Kinetis from debugger script

scottm — Mon, 02 Jan 2017 17:17:31 GMT

The reg commands set the pins properly, and then the Cyclone ACP starts and performs a hardware reset on the target, so the pins reset again. The next script sets the pins back to a safe state and they stay that way through another target task that loads the bootloader. According to P&E the target task download function is Freescale-provided and they don't know anything about how it's implemented. The problem here is in the P&E standard download and I've got P&E working on a solution. Here's the log output:

Executing Initialization File: ...\Project_Settings\Debugger\init_kinetis.tcl
radix x
cmdwin::eclipse::config hexprefix 0x
cmdwin::eclipse::config MemIdentifier p
cmdwin::eclipse::config MemWidth 32
cmdwin::eclipse::config MemAccess 32
cmdwin::eclipse::config MemSwap off
cmdwin::reg SIM_SCGC5 = 0X00040382
cmdwin::reg GPIOA_PDDR = 0X00000030
cmdwin::reg GPIOA_PDOR = 0x00000000
cmdwin::reg PORTA_PCR4 = 0X00000100
cmdwin::reg PORTA_PCR5 = 0X00000100

/* pins are now set properly */

cmdwin::reg User\/System Mode Registers/LR = 0xFFFFFFFF
cmdwin::reg Core Debug Registers/DEMCR = 0x1000001
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FUNCTION0 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FUNCTION1 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FUNCTION2 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FUNCTION3 = 0x0
cmdwin::reg Flash Patch and Breakpoint Unit Registers/FP_COMP0 = 0x0
cmdwin::reg Flash Patch and Breakpoint Unit Registers/FP_COMP1 = 0x0
cmdwin::reg Flash Patch and Breakpoint Unit Registers/FP_COMP2 = 0x0
cmdwin::reg Flash Patch and Breakpoint Unit Registers/FP_COMP3 = 0x0
cmdwin::reg Flash Patch and Breakpoint Unit Registers/FP_COMP4 = 0x0
cmdwin::reg Flash Patch and Breakpoint Unit Registers/FP_COMP5 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_CTRL = 0x40000000
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_CYCCNT = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_CPICNT = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_EXCCNT = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_SLEEPCNT = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_LSUCNT = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FOLDCNT = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_COMP0 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_COMP1 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_COMP2 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_COMP3 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_MASK0 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_MASK1 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_MASK2 = 0x0
cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_MASK3 = 0x0
cmdwin::reg Instrumentation Trace Macrocell Registers/ITM_LAR = 0xc5acce55
cmdwin::reg Instrumentation Trace Macrocell Registers/ITM_TER = 0x0
cmdwin::reg Instrumentation Trace Macrocell Registers/ITM_TPR = 0x0
cmdwin::reg Instrumentation Trace Macrocell Registers/ITM_TCR = 0x0
cmdwin::reg Instrumentation Trace Macrocell Registers/ITM_LAR = 0x1
cmdwin::reg Embedded Trace Funnel Registers/ETF_FCR = 0x300
cmdwin::reg System Control Registers/SCB_VTOR = 0x20000000

Starting 3rd party flash programming...
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : SPECIFY_NETWORKCARD_ENABLED, Value : 0, R) => DI_OK
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PARTITION_PARAM, Value : 0, R) => DI_ERR_NONFATAL
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DO_PARTITIONING, Value : 0, R) => DI_ERR_NONFATAL
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DOTRIM, Value : 0, R) => DI_OK
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : CUSTOM_TRIM, Value : 0, R) => DI_OK
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : NGS_TRIM_OVERRIDE_REFERENCE_FREQUENCY, Value : 3276800, R) => DI_OK
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PARTITION_PARAM, Value : 0, R) => DI_ERR_NONFATAL
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DO_PARTITIONING, Value : 0, R) => DI_ERR_NONFATAL
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DOTRIM, Value : 0, R) => DI_OK
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : CUSTOM_TRIM, Value : 0, R) => DI_OK
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : NGS_TRIM_OVERRIDE_REFERENCE_FREQUENCY, Value : 3276800, R) => DI_OK
INF: Copyright 2012 P&E Microcomputer Systems,Inc.
INF: Command Line :"C:\Freescale\CW MCU v10.7\eclipse\..\MCU\bin\de.exe" -noni -language en -ORBendPoint giop:tcp:127.0.0.1: -ORBtraceLevel 0
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : IS_GDB_CONFIG, Value : 0, R) => DI_ERR_NONFATAL
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PARTITION_PARAM, Value : 0, R) => DI_ERR_NONFATAL
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DO_PARTITIONING, Value : 0, R) => DI_ERR_NONFATAL
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DOTRIM, Value : 0, R) => DI_OK
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : CUSTOM_TRIM, Value : 0, R) => DI_OK
GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : NGS_TRIM_OVERRIDE_REFERENCE_FREQUENCY, Value : 3276800, R) => DI_OK
INF: CMD>RE
INF: Initializing.
INF: Target has been RESET and is active.

/* pins are now back to default state */

INF: CMD>CM C:\Freescale\CW MCU v10.7\MCU\bin\Plugins\support\arm\gdi\P&E\k22fn1m0m12_pflash_pipeline.arp
INF: Initializing.
INF: Initialized.
INF: ;version 1.01, 07/17/2013, Copyright P&E Microcomputer Systems, www.pemicro.com [mk22_1024k_n_pflash0_pflash1_m10]
INF: ;device freescale, k22fn1m0m12, 1x32x256k, desc=pflash_pipeline
INF: ;begin_cs device=$00000000, length=$00100000, ram=$20000000
INF: Loading programming algorithm ...
INF: Done.
INF: CMD>EM
INF: Erasing.
INF: Module has been erased.
INF: Reloading programming algorithm ...
INF: done.
INF: CMD>PM
INF: Programming.
INF: Processing Object File Data ...
INF: .
INF: Programmed.
INF: CMD>VC
INF: Verifying object file CRC-16 to device ranges ...
INF: block 00000000-00000187 ...
INF: Ok.
INF: block 00000410-00000413 ...
INF: Ok.
INF: block 00000418-00031CB3 ...
INF: Ok.
INF: Checksum Verification Successful. (Cumulative CRC-16=$93C7)
INF: CMD>RE
INF: Initializing.
INF: Target has been RESET and is active.

Executing download task: S:\projects\ADS-SR2\code\Project_Settings\Debugger\set_ptt.tcl
cmdwin::reg SIM_SCGC5 = 0X00040382
cmdwin::reg GPIOA_PDDR = 0X00000030
cmdwin::reg GPIOA_PDOR = 0x00000000
cmdwin::reg PORTA_PCR4 = 0X00000100
cmdwin::reg PORTA_PCR5 = 0X00000100

/* pins are safe again, and stay that way through the rest of the process */

Executing download task: ...\Load Bootloader.tcl
cmdwin::fl::target -lc SR2 Debug
thread break: Stopped, 0x0, 0x0, cpuARMLittle, ADS-SR2.elf (state, tid, pid, cpu, target)
cmdwin::fl::target -b 0x1fff0000 0x20000
cmdwin::fl::target -v off -l off
cmdwin::fl::device -d FTFE_PFlash1M0 -o 128Kx64x1 -a 0x0 0xfffff
cmdwin::fl::image -f ...K22Bootloader.elf -t Auto Detect -re on -r 0xf9000 0xfffff -oe off
cmdwin::fl::write
Beginning Operation ...
-------------------------
Using restricted address range 0x000F9000 to 0x000FFFFF
Programming file ...K22Bootloader.elf
Auto-detection is successful.
File is of type Elf Format.

Performing target initialization ...
Downloading Flash Device Driver ...
Reading flash ID ...
Auto-detection is successful.
File is of type Elf Format.

Downloading 0x00003C08 bytes to be programmed at 0x000F9000
Executing program ....
Program Command Succeeded